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Attachment #1
TABLE II. Pin combination
to be tested. 1/ 2/
1/ Table II is restated in narrative form in 3.4 below.
2/ No connects are not to be tested.
3/ Repeat pin combination I for each named Power supply and for ground
(e.g., where V
PS1
is V
DD
, V
CC
, V
SS
, V
BB
, GND, +V
S,
-V
S
, V
REF
, etc).
3.4
a.
Pin combinations to be tested.
Each pin individually connected to terminal A
with respect to the device ground pin(s) connected
to terminal B. All
pins except the one being tested and the ground pin(s) shall be open.
Each pin individually connected to terminal A with respect to each different set of a combination
of all named power supply pins (e.g., V
SS1
, or V
SS2
or V
SS3
or V
CC1
, or V
CC2
) connected to
terminal B. All pins except the one being tested and the power supply pin or
set of pins shall be
open.
Each input and each output individually connected to terminal A with respect to a combination of
all the other input and output pins connected to terminal B. All pins except the input or output pin
being tested and the combination of all the other input and output pins shall be open.
b.
c.
Terminal A
(Each pin individually
connected to terminal A
with the other floating)
All pins except V
PS1
3/
All input and output pins
Terminal B
(The common
combination
of all like-named pins
connected to terminal B)
All V
PS1
pins
1.
2.
All other input-output pins
Mil Std 883D
Method 3015.7
Notice 8
REGULATED
HIGH VOLTAGE
SUPPLY
TERMINAL D
DUT
SOCKET
TERMINAL C
TERMINAL B
TERMINAL A
CURRENT
PROBE
(NOTE 6)
R = 1.5k
W
C = 100pf
SHORT
R2
S2
S1
R1
C1