參數(shù)資料
型號: MAX9967BRCCQ+TD
廠商: Maxim Integrated Products
文件頁數(shù): 11/30頁
文件大?。?/td> 0K
描述: IC DCL DUAL 500MBPS ATE 100TQFP
標(biāo)準(zhǔn)包裝: 250
系列: ATE
邏輯類型: 比較器, 驅(qū)動器
電源電壓: -1.5 V ~ 6.5 V
位數(shù): 2
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
MAX9967
Dual, Low-Power, 500Mbps ATE
Driver/Comparator with 35mA Load
______________________________________________________________________________________
19
PIN
NAME
FUNCTION
54
TRCV2
Channel 2 RCV Termination Voltage Input. Termination voltage input for the RCV2 and NRCV2
differential inputs. Not internally connected on versions without internal termination resistors.
55
NRCV2
56
RCV2
Channel 2 Multiplexer Control Inputs. Differential controls RCV2 and NRCV2 place channel 2 into
receive mode. Drive RCV2 above NRCV2 to place channel 2 into receive mode. Drive NRCV2 above
RCV2 to place channel 2 into drive mode.
57
TLDEN2
Channel 2 Load Enable Termination Voltage Input. Termination voltage input for the LDEN2 and
NLDEN2 differential inputs. Not internally connected on versions without internal termination
resistors.
58
NLDEN2
59
LDEN2
Channel 2 Multiplexer Control Inputs. Differential controls LDEN2 and NLDEN2 enable/disable the
active load. Drive LDEN2 above NLDEN2 to enable the channel 2 active load. Drive NLDEN2 above
LDEN2 to disable the channel 2 active load.
61
RST
Reset Input. Asynchronous reset input for the serial register. RST is active low and asserts
low-leakage mode. At power-up, hold RST low until VCC and VEE have stabilized.
62
CS
Chip-Select Input. Serial port activation input. CS is active low.
63
THR
Single-Ended Logic Threshold. Leave THR unconnected to set the threshold to +1.25V or force THR
to a desired threshold voltage.
64
SCLK
Serial-Clock Input. Clock for serial port.
65
DIN
Data Input. Serial port data input.
67
LDEN1
68
NLDEN1
Channel 1 Multiplexer Control Inputs. Differential controls LDEN1 and NLDEN1 enable/disable the
active load. Drive LDEN1 above NLDEN1 to enable the channel 1 active load. Drive NLDEN1 above
LDEN1 to disable the channel 1 active load.
69
TLDEN1
Channel 1 Load Enable Termination Voltage Input. Termination voltage input for the LDEN1 and
NLDEN1 differential inputs. Not internally connected on versions without internal termination
resistors.
70
RCV1
71
NRCV1
Channel 1 Multiplexer Control Inputs. Differential controls RCV1 and NRCV1 place channel 1 into
receive mode. Drive RCV1 above NRCV1 to place channel 1 into receive mode. Drive NRCV1 above
RCV1 to place channel 1 into drive mode.
72
TRCV1
Channel 1 RCV Termination Voltage Input. Termination voltage input for the RCV1 and NRCV1
differential inputs. Not internally connected on versions without internal termination resistors.
73
DATA1
74
NDATA1
Channel 1 Multiplexer Control Inputs. Differential controls DATA1 and NDATA1 select driver 1’s
input from DHV1 or DLV1. Drive DATA1 above NDATA1 to select DHV1. Drive NDATA1 above
DATA1 to select DLV1.
75
TDATA1
Channel 1 Data Termination Voltage Input. Termination voltage input for the DATA1 and NDATA1
differential inputs. Not internally connected on versions without internal termination resistors.
77
LDH1
Channel 1 Active-Load Sink Current Reference Input
78
LDL1
Channel 1 Active-Load Source Current Reference Input
79
COM1
Channel 1 Active Load Commutation Voltage Reference Input
86
CL1
87
NCL1
Channel 1 Low Comparator Output. Differential output of channel 1 low comparator.
Pin Description (continued)
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