參數(shù)資料
型號(hào): MAX9967BRCCQ+D
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 15/30頁(yè)
文件大?。?/td> 0K
描述: IC DCL DUAL 500MBPS ATE 100TQFP
標(biāo)準(zhǔn)包裝: 90
系列: ATE
邏輯類型: 比較器, 驅(qū)動(dòng)器
電源電壓: -1.5 V ~ 6.5 V
位數(shù): 2
工作溫度: 0°C ~ 70°C
安裝類型: *
封裝/外殼: *
供應(yīng)商設(shè)備封裝: *
包裝: *
MAX9967
Dual, Low-Power, 500Mbps ATE
Driver/Comparator with 35mA Load
22
______________________________________________________________________________________
DUT_ can be toggled at high speed between the buffer
output and high-impedance mode, or it can be placed
into low-leakage mode (Figure 2, Table 1). In high-
impedance mode, the clamps are connected. High-
speed input RCV_ and mode control bits TMSEL and
LLEAK control the switching. In high-impedance mode,
the bias current at DUT_ is less than 1.5A over the 0 to
3V range, while the node maintains its ability to track
high-speed signals. In low-leakage mode, the bias cur-
rent at DUT_ is further reduced to less than 50nA, and
signal tracking slows. See the Low-Leakage Mode,
LLEAK section for more details.
The nominal driver output resistance is 50
. Contact
the factory for different resistance values within the 45
to 51
range.
Clamps
Configure the voltage clamps (high and low) to limit the
voltage at DUT_ and to suppress reflections when the
channel is configured as a high-impedance receiver.
The clamps behave as diodes connected to the out-
puts of high-current buffers. Internal circuitry compen-
sates for the diode drop at 1mA clamp current. Set the
clamp voltages using the external connections CPHV_
and CPLV_. The clamps are enabled only when the dri-
ver is in the high-impedance mode (Figure 2). For tran-
sient suppression, set the clamp voltages to
approximately the minimum and maximum expected
DUT_ voltage range. The optimal clamp voltages are
application specific and must be empirically deter-
mined. If clamping is not desired, set the clamp volt-
ages at least 0.7V outside the expected DUT_ voltage
range; overvoltage protection remains active without
loading DUT_.
Comparators
The MAX9967 provides two independent high-speed
comparators for each channel. Each comparator has
one input connected internally to DUT_ and the other
input connected to either CHV_ or CLV_ (see the
Functional Diagram). Comparator outputs are a logical
result of the input conditions, as indicated in Table 3.
Three configurations are available for the comparator
differential outputs to ease interfacing with a wide vari-
ety of logic families. An open-collector configuration
switches an 8mA current source between the two out-
puts. This configuration is available with and without
internal termination resistors connected to VCCO_
(Figure 3). For open-collector versions without internal
termination, leave VCCO_ unconnected and add the
required external resistors. These resistors are typically
50
to the pullup voltage at the receiving end of the
output trace. Alternate configurations may be used,
provided that the Absolute Maximum Ratings are not
exceeded. For open-collector versions with internal ter-
mination, connect VCCO_ to the desired VOH voltage.
SLEW RATE
DLV_
DHV_
DTV_
DATA_
RCV_
MODE
BUFFER
50
DUT_
4
TMSEL
SC0
SC1
LLEAK
CPHV_
CPLV_
HIGH-Z
0
1
HIGH-
SPEED
INPUTS
REFERENCE
INPUTS
COMPARATORS
ACTIVE LOAD
CLAMPS
Figure 2. Simplified Driver Channel
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