
Supply Bypassing/Layout
To maximize output power and minimize distortion,
proper layout and supply bypassing is essential. To
prevent ground-loop-induced noise and minimize noise
due to parasitic ground inductance, use separate
ground planes for input-signal ground connections
(SGND plane) and output-power ground connections
(PGND plane). For dual-supply applications, connect
MID to the SGND plane. For single-supply operation,
connect MID to an external voltage-divider and bypass
MID to the SGND plane with a decoupling network (see
Figure 11). This provides a sufficient low- and high-fre-
quency AC ground for the internal amplifiers. Connect
the SGND and PGND planes together at a single point
in the PCB near the MAX9742. Minimize the parasitic
trace inductances and resistances associated with the
VDD and VSS connections, by using wide traces of min-
imal length.
Proper power-supply bypassing is essential to ensure
low distortion operation and to prevent excessive sup-
ply pumping when using the single-ended output con-
figuration. For dual-supply operation, bypass VDD and
VSS to PGND with 1000F aluminum electrolytic capac-
itors. VDD and VSS should also be bypassed to PGND
with 0.1F capacitors as physically close as possible to
VDD and VSS pins to provide sufficient high-frequency
decoupling. Also, connect an additional 1F capacitor
between VDD and VSS. For single-supply operation,
bypass VDD to PGND with two 330F capacitors. VDD
should also be bypassed to PGND with an additional
0.1F capacitor as physically close as possible to the
VDD pin.
The MAX9742 includes voltage regulators for the inter-
nal amplifiers, logic circuitry, and gate-drive circuitry
that require external bypassing. Bypass REGP and
REGM to the SGND plane with 1F capacitors. Bypass
REGLS to NSENSE with a 1F capacitor. Bypass LVDD
to LGND with a 0.1F capacitor. The voltage rating
requirements of the external bypass capacitors must
be taken into account. This is especially important
when selecting the REGP and REGM bypass capaci-
tors since the ground-referenced voltages present at
these regulator outputs are dependent on the voltage
applied to the MID input. The minimum required volt-
age ratings for the regulator bypass capacitors are
summarized in Table 4.
Thermal Considerations
Class D amplifiers provide much better efficiency and
thermal performance than a comparable Class AB
amplifier. However, the system’s thermal performance
must be considered with realistic expectations along
with its many parameters.
Continuous Sine Wave vs. Music
When a Class D amplifier is evaluated in the lab, often
a continuous sine wave is used as the signal source.
While this is convenient for measurement purposes, it
represents a worst-case scenario for thermal loading
on the amplifier. It is not uncommon for a Class D
amplifier to enter thermal shutdown if driven near maxi-
mum output power with a continuous sine wave. The
PCB must be optimized for best dissipation (see the
PCB Thermal Considerations section). Audio content,
both music and voice, has a much lower RMS value rel-
ative to its peak output power. Therefore, while an
audio signal may reach similar peaks as a continuous
sine wave, the actual thermal impact on the Class D
amplifier is highly reduced. If the thermal performance
of a system is being evaluated, it is important to use
actual audio signals instead of sine waves for testing. If
sine waves must be used, the thermal performance is
less than the system’s actual capability for real music
or voice.
PCB Thermal Considerations
The exposed paddle is the primary route for conducting
heat away from the IC. With a bottom-side exposed pad-
dle, the PCB and its copper becomes the primary
heatsink for the Class D amplifier. Solder the exposed
paddle to a copper polygon. Add as much copper as
possible from this polygon to any adjacent pin on the
Class D amplifier as well as to any adjacent components,
provided these connections are at the same potential.
MAX9742
Single-/Dual-Supply, Stereo 16W,
Class D Amplifier with Differential Inputs
______________________________________________________________________________________
29
Table 4. Minimum Required Voltage
Ratings for Regulator Bypass Capacitors
CAPACITOR
VOLTAGE RATING (V)
CREGP
VMID + 5
CREGM
VMID - 5
CREGLS
7
CLVDD
5