參數資料
型號: MAX9718AEUB+T
廠商: Maxim Integrated Products
文件頁數: 4/27頁
文件大?。?/td> 0K
描述: IC AMP AUDIO PWR 1.4W AB 10MSOP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: AB 類
輸出類型: 1-通道(單聲道)
在某負載時最大輸出功率 x 通道數量: 1.4W x 1 @ 4 歐姆
電源電壓: 2.7 V ~ 5.5 V
特點: 消除爆音,差分輸入,關閉,熱保護
安裝類型: 表面貼裝
供應商設備封裝: 10-µMAX-EP
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)裸露焊盤
包裝: 帶卷 (TR)
MAX9718/MAX9719
Input Filter
The fully differential amplifier inputs can be biased at
voltages other than midsupply. The common-mode
feedback circuit adjusts for input bias, ensuring the
outputs are still biased at midsupply. Input capacitors
are not required as long as the common-mode input
voltage is within the specified range listed in the
Electrical Characteristics table.
If input capacitors are used, input capacitor CIN, in
conjunction with RIN, forms a highpass filter that
removes the DC bias from an incoming signal. The AC-
coupling capacitor allows the amplifier to bias the sig-
nal to an optimum DC level. Assuming zero-source
impedance, the -3dB point of the highpass filter is
given by:
Setting f-3dB too high affects the low-frequency
response of the amplifier. Use capacitors with
dielectrics that have low-voltage coefficients, such as
tantalum or aluminum electrolytic. Capacitors with high-
voltage coefficients, such as ceramics, can increase
distortion at low frequencies.
BIAS Capacitor
BIAS is the output of the internally generated VCC /2
bias voltage. The BIAS bypass capacitor, CBIAS,
improves PSRR and THD+N by reducing power supply
and other noise sources at the common-mode bias
node, and also generates the clickless/popless startup
DC bias waveform for the speaker amplifiers. Bypass
BIAS with a 0.1F capacitor to GND. Larger values of
CBIAS (up to 1F) improve PSRR, but slow down
tON/tOFF times. A 1F CBIAS capacitor slows turn-on
and turn-off times by 10 and improves PSRR by 20dB
(at 1kHz). Do not connect external loads to BIAS.
Supply Bypassing
Proper power-supply bypassing ensures low-noise,
low-distortion performance. Connect a 1F ceramic
capacitor from VCC to GND. Add additional bulk
capacitance as required by the application. Locate the
bypass capacitor as close to the device as possible.
Layout and Grounding
Good PC board layout is essential for optimizing perfor-
mance. Use large traces for the power-supply inputs and
amplifier outputs to minimize losses due to parasitic trace
resistance and route heat away from the device. Good
grounding improves audio performance, minimizes
crosstalk between channels, and prevents any digital
switching noise from coupling into the audio signal.
The MAX9718/MAX9719 TDFN, TQFN, TSSOP, and
MAX packages feature exposed thermal pads on their
undersides. This pad lowers the thermal resistance of the
package by providing a direct-heat conduction path
from the die to the PC board. Connect the exposed pad
to the ground plane using multiple vias, if required.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow tem-
perature profile, as well as the latest information on
reliability testing results, refer to the Application Note
1891:
Wafer-Level Packaging (WLP) and Its Applications.
f
RC
dB
IN IN
=
3
1
2
π
Low-Cost, Mono/Stereo,
1.4W Differential Audio Power Amplifiers
12
______________________________________________________________________________________
PART
MONO STEREO
GAIN
(dB)
SELECTABLE
SHUTDOWN
POLARITY
MAX9718A/H
Adjustable
MAX9718B/E
—0
MAX9718C/F
—3
MAX9718D/G
—6
MAX9719A
Adjustable
MAX9719B
0—
MAX9719C
3—
MAX9719D
6—
Selector Guide
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相關代理商/技術參數
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