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參數(shù)資料
| 型號： | MAX9709ETN+D |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 20/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP AUDIO PWR 50W STER 56TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 37 |
| 類型： | D 類 |
| 輸出類型： | 1-通道（單聲道）或 2-通道（立體聲） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 50W x 1 @ 4 歐姆; 29W x 2 @ 8 歐姆 |
| 電源電壓： | 10 V ~ 22 V |
| 特點： | 消除爆音，差分輸入，靜音，短路和熱保護，關(guān)機 |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 56-TQFN-EP（8x8） |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1392 (CN2011-ZH PDF) |
MAX9709
25W/50W, Filterless, Spread-Spectrum,
Stereo/Mono, Class D Amplifier
_______________________________________________________________________________________
9
Pin Description (continued)
PIN
NAME
FUNCTION
8
C1N
Charge-Pump Flying Capacitor C1, Negative Terminal
9
C1P
Charge-Pump Flying Capacitor C1, Positive Terminal
10
CPVDD
Charge-Pump Power Supply. Bypass to PVDD with a 1F capacitor as close to pin as possible.
11
SYNCOUT
Open-Drain Slew-Rate-Limited Clock Output. Pullup with a 10k
Ω to resistor to REG.
13
SYNCIN
Clock Synchronization Input. Allows for synchronization of the internal oscillator with an external
clock.
14
FS2
Frequency Select 2
15
FS1
Frequency Select 1
16
INL-
Left-Channel Negative Input (Stereo Mode Only)
17
INL+
Left-Channel Positive Input (Stereo Mode Only)
18
MONO
Mono/Stereo Mode Input. Drive logic high for mono mode. Drive logic low for stereo mode.
19, 20, 21
REG
Internal Regulator Output Voltage (6V). Bypass with a 0.01F capacitor to GND.
22, 23
GND
Analog Ground
24
SS
Soft-Start. Connect a 0.47F capacitor to GND to utilize soft-start power-up sequence.
25
VDD
Analog Power Supply. Bypass to GND with a 0.1F capacitor as close to pin as possible.
26
INR-
Right-Channel Negative Input. In mono mode, INR- is the negative input.
27
INR+
Right-Channel Positive Input. In mono mode, INR+ is the positive input.
28
G1
Gain Select input 1
29
G2
Gain Select input 2
30
SHDN
Active-Low Shutdown Input. Drive SHDN high for normal operation. Drive SHDN low to place the
device in shutdown mode.
31
MUTE
Active-Low Mute Input. Drive logic low to place the device in mute. In mute mode, Class D output
stage is no longer switching. Drive high for normal operation. MUTE is internally pulled up to
VREG with a100k
Ω resistor.
32
TEMP
Thermal Flag Output, Open Drain. Pullup with a 10k
Ω resistor to REG.
33
TH2
Temperature Flag Threshold Select Input 2
34
TH1
Temperature Flag Threshold Select Input 1
35
TH0
Temperature Flag Threshold Select Input 0
45, 46
OUTR-
Right-Channel Negative Output
47, 48
OUTR+
Right-Channel Positive Output
51, 52
OUTL-
Left-Channel Negative Output
53, 54
OUTL+
Left-Channel Positive Output
EP
GND
Exposed Paddle. Connect to GND with multiple vias for best heat dissipation.
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