參數(shù)資料
型號(hào)： MAX9485ETP+
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： 時(shí)鐘產(chǎn)生/分配
英文描述： 73.728 MHz, OTHER CLOCK GENERATOR, QCC20
封裝： 4 X 4 MM, 0.80 MM PITCH, MO-220WGGD-1, TQFN-20
文件頁(yè)數(shù)： 14/16頁(yè)
文件大?。?/td> 258K
代理商： MAX9485ETP+
MAX9485
Programmable Audio Clock Generator
_______________________________________________________________________________________
7
Functional Diagram
MCLK
CLK_OUT1
SCL/FS0
SDA/FS1
FS2
CLK_OUT2
VDD
COUNTER N
PHASE
DETECTOR
AND LOOP
FILTER
VCO
PLL
DIVIDING
COUNTER
CONTROL
REGISTERS
COUNTER M
RESET
VCXO
TUN
X1
X2
MODE
RST
MAX9485
VDD_P
GND
GND_P
SAO1 SAO2
Detailed Description
The MAX9485 uses an input reference frequency of
27MHz from a crystal or system reference clock. The
device provides two buffered clock outputs of 256, 384,
or 768 times the chosen sampling frequency (fS) select-
ed through an I2C interface or hardwired inputs.
Sampling frequencies of 12kHz, 32kHz, 44.1kHz,
48kHz, 64kHz, 88.2kHz, or 96kHz are available. The
MAX9485 offers a buffered 27MHz output and an inte-
grated VCXO tuned by a DC voltage generated from the
MPEG system. The device operates with a 3.3V supply.
Reference and Output Clock
The MAX9485 uses the 27MHz crystal or reference
clock (master clock) from the audio system and gener-
ates an output of 256, 384, or 768 times the audio sys-
tem sampling frequency (fS). Connect a fundamental
mode crystal between X1 and X2 or drive X1 with a
27MHz system clock. The choices of sampling frequen-
cies are 12kHz, 32kHz, 44.1kHz, 48kHz, 64kHz,
88.2kHz, and 96kHz. The MAX9485 offers two identical
outputs: CLK_OUT1 and CLK_OUT2. In the following,
the CLK_OUT is used to refer to both outputs. Table 1
shows the relations of fS and the output frequency.
Select the output frequency by programming the I2C
register or hardwiring inputs FS0, FS1, and FS2.
CLK_OUT settling is typically 15ms from power-on or
from applying the clock to X1. Delay time from sampling
frequency change to CLK_OUT settling is 10ms (typ).
Figure 1 illustrates CLK_OUT transient timing in the I2C
programmed case. The I2C register is set through a
master-write data transfer. The frequency settling time
tFST is counted from the end of the next ACK pulse of
the written byte in SDA until the CLK_OUT is settled.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX9485ETP+ 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
MAX9485ETP+T 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
MAX9485ETP-T 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
MAX9485EUP 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
MAX9485EUP+ 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Programmable Audio Clock Generator RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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