參數(shù)資料
型號(hào): MAX9378EUA+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 4/9頁(yè)
文件大小: 0K
描述: IC TRANSLATOR SGL 8-UMAX
標(biāo)準(zhǔn)包裝: 50
邏輯功能: 變換器
位數(shù): 1
輸入類型: AnyLevel?
輸出類型: LVDS
通道數(shù): 1
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 是/是
傳輸延遲(最大): 0.6ns
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 管件
MAX9377/MAX9378
Anything-to-LVPECL/LVDS Translators
with Pin-Selectable Divide-by-Four
4
_______________________________________________________________________________________
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Reset-to-Differential Output Low
Delay
tDR
Figure 4
0.8
1.0
ns
Reset-to-Input Clock Setup Time
tSET
Figure 4
0.5
ns
Clock-to-Divider Output
Propagation Delay
tPCO
Figure 4 (Note 5)
0.6
1.0
ns
SEL to Switched Output Delay
tSEL
Figure 5
0.3
0.6
ns
MAX9377
Switching Frequency
fMAX
VOH - VOL
≥ 250mV
2.0
2.5
GHz
Propagation Delay Low to High
tPLH
Figure 3, SEL = 0
250
421
600
ps
Propagation Delay High to Low
tPHL
Figure 3, SEL = 0
250
421
600
ps
Pulse Skew |tPLH -tPHL|tSKEW
(Note 6)
6
30
ps
Output Low-to-High Transition
Time (20% to 80%)
tR
Figure 3
116
220
ps
Output High-to-Low Transition
Time (20% to 80%)
tF
Figure 3
116
220
ps
Added Random Jitter
tRJ
fIN = 1.34GHz (Note 7), SEL = 0
0.7
2
ps(RMS)
MAX9378
Switching Frequency
fMAX
VOD
≥ 250mV
2.0
2.5
GHz
Propagation Delay Low to High
tPLH
Figure 3, SEL = 0
250
363
600
ps
Propagation Delay High to Low
tPHL
Figure 3, SEL = 0
250
367
600
ps
Pulse Skew |tPLH - tPHL|tSKEW
Figure 3 (Note 6)
3
30
ps
Output Low-to-High Transition
Time (20% to 80%)
tR
Figure 2
93
220
ps
Output High-to-Low Transition
Time (20% to 80%)
tF
Figure 2
93
220
ps
Added Random Jitter
tRJ
fIN = 1.34GHz (Note 7), SEL = 0
0.8
2
ps(RMS)
Note 1: Measurements are made with the device in thermal equilibrium. All voltages are referenced to ground except VTHD, VID,
VOD, and
VOD.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at TA = +25°C and guaranteed by design and characterization over the full operating
temperature range.
Note 4: Guaranteed by design and characterization, not production tested. Limits are set at ±6 sigma.
Note 5: tPCO is the delay associated with the frequency-divider function. The total delay when divide-by-four is selected is tPCO +
tPLH.
Note 6: tSKEW is the magnitude difference of differential propagation delays for the same output under same conditions; tSKEW =
|tPHL - tPLH|.
Note 7: Device jitter added to the input signal.
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, differential input voltage |VID| = 0.1V to 1.2V, input frequency
≤ 1.34GHz, differential input transition time =
125ps (20% to 80%), input voltage (VIN, VIN) = 0 to VCC, input common-mode voltage VCM = 0.05V to (VCC - 0.05V), LVPECL outputs
terminated with 50
±1% to (VCC - 2.0V) MAX9377, LVDS outputs terminated with RL = 100 ±1% (MAX9378), TA = -40°C to +85°C.
Typical values are at VCC = +3.3V, |VID| = 0.2V, input common-mode voltage VCM = 1.2V, TA = +25°C, unless otherwise noted.)
(Note 4)
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