參數(shù)資料
型號: MAX9312ECJ+T
廠商: Maxim Integrated Products
文件頁數(shù): 6/9頁
文件大小: 0K
描述: IC CLK/DATA BUFF 1:5 3GHZ 32LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,000
類型: 扇出緩沖器(分配),數(shù)據(jù)
電路數(shù): 2
比率 - 輸入:輸出: 1:5
差分 - 輸入:輸出: 是/是
輸入: HSTL,LVECL,LVPECL
輸出: LVECL,LVPECL
頻率 - 最大: 3GHz
電源電壓: 2.25 V ~ 3.8 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 帶卷 (TR)
MAX9312/MAX9314
Dual 1:5 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
6
_______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1, 9, 16, 25, 32
VCC
Positive Supply Voltage. Bypass from VCC to VEE with 0.1F and 0.01F ceramic capacitors.
Place the capacitors as close to the device as possible with the smaller value capacitor closest to
the device.
2
N.C.
No Connection. Internally not connected.
3
CLKA
Noninverting Differential Clock Input A
4
CLKA
Inverting Differential Clock Input A
5VBB
Reference Output Voltage. Connect to the inverting or noninverting clock input to provide a
reference for single-ended operation. When used, bypass to VCC with a 0.01F ceramic
capacitor.
6
CLKB
Noninverting Differential Clock Input B
7
CLKB
Inverting Differential Clock Input B
8VEE
Negative Supply Voltage
10
QB4
Inverting QB4 Output. Typically terminate with 50
resistor to VCC - 2V.
11
QB4
Noninverting QB4 Output. Typically terminate with 50
resistor to VCC - 2V.
12
QB3
Inverting QB3 Output. Typically terminate with 50
resistor to VCC - 2V.
13
QB3
Noninverting QB3 Output. Typically terminate with 50
resistor to VCC - 2V.
14
QB2
Inverting QB2 Output. Typically terminate with 50
resistor to VCC - 2V.
15
QB2
Noninverting QB2 Output. Typically terminate with 50
resistor to VCC - 2V.
17
QB1
Inverting QB1 Output. Typically terminate with 50
resistor to VCC - 2V.
18
QB1
Noninverting QB1 Output. Typically terminate with 50
resistor to VCC - 2V.
19
QB0
Inverting QB0 Output. Typically terminate with 50
resistor to VCC - 2V.
20
QB0
Noninverting QB0 Output. Typically terminate with 50
resistor to VCC - 2V.
21
QA4
Inverting QA4 Output. Typically terminate with 50
resistor to VCC - 2V.
22
QA4
Noninverting QA4 Output. Typically terminate with 50
resistor to VCC - 2V.
23
QA3
Inverting QA3 Output. Typically terminate with 50
resistor to VCC - 2V.
24
QA3
Noninverting QA3 Output. Typically terminate with 50
resistor to VCC - 2V.
26
QA2
Inverting QA2 Output. Typically terminate with 50
resistor to VCC - 2V.
27
QA2
Noninverting QA2 Output. Typically terminate with 50
resistor to VCC - 2V.
28
QA1
Inverting QA1 Output. Typically terminate with 50
resistor to VCC - 2V.
29
QA1
Noninverting QA1 Output. Typically terminate with 50
resistor to VCC - 2V.
30
QA0
Inverting QA0 Output. Typically terminate with 50
resistor to VCC - 2V.
31
QA0
Noninverting QA0 Output. Typically terminate with 50
resistor to VCC - 2V.
—EP
Exposed Pad (TQFN package only). Internally connected to VEE. Connect EP to the VEE pad on
the PCB.
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