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參數(shù)資料
| 型號： | MAX9272GTM+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 31/47頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSERIALIZER 28BIT GMSL 48TQFN |
| 標準包裝： | 43 |
| 系列： | * |
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MAX9272
28-Bit GMSL Deserializer for Coax or STP Cable
37
Maxim Integrated
Table 11. MAX9272 Feature Compatibility
Providing a Frame Sync
(Camera Applications)
The GPI/GPO provides a simple solution for camera
applications that require a frame sync signal from the
ECU (e.g., surround-view systems). Connect the ECU
frame sync signal to the GPI input, and connect the GPO
output to the camera frame sync input. GPI/GPO have
a typical delay of 275Fs. Skew between multiple GPI/
GPO channels is 115Fs (max). If a lower skew signal is
required, connect the camera’s frame sync input to one
of the GMSL deserializer’s GPIOs and use an I2C broad-
cast write command to change the GPIO output state.
This has a maximum skew of 1.5Fs.
Software Programming
of the Device Addresses
Both the serializer and the deserializer have program-
mable device addresses. This allows multiple GMSL
devices, along with I2C peripherals, to coexist on the
same control channel. The serializer device address
is in register 0x00 of each device, while the deserial-
izer device address is in register 0x01 of each device.
To change a device address, first write to the device
whose address changes (register 0x00 of the serializer
for serializer device address change, or register 0x01 of
the deserializer for deserializer device address change).
Then write the same address into the corresponding reg-
ister on the other device (register 0x00 of the deserializer
for serializer device address change, or register 0x01 of
the serializer for deserializer device address change).
Three-Level Configuration Inputs
CX/TP is a three-level input that controls the serial-
interface configuration and power-up defaults. Connect
CX/TP through a pullup resistor to IOVDD to set a high
level, a pulldown resistor to GND to set a low level, or
IOVDD/2 or open to set a midlevel. For digital control,
use three-state logic to drive the three-level logic input.
Configuration Blocking
The deserializer can block changes to registers. Set
CFGBLOCK to make all registers read only. Once set,
the registers remain blocked until the supplies are
removed or until PWDN is low.
Compatibility with other GMSL Devices
The MAX9272/MAX9273 deserializers are designed to
pair with the MAX9271/MAX9273 serializers, but inter-
operate with any GMSL serializers. See the Table 11 for
operating limitations.
GPIOs
The deserializer has two open-drain GPIOs available
when not used as configuration inputs. GPIO1OUT and
GPIO0OUT (0x0E, D3 and D1) set the output state of the
GPIOs. Setting the GPIO output bits to 0 pulls the output
low, while setting the bits to 1 leaves the output undriven
and pulled high through internal/external pullup resistors.
The GPIO input buffers are always enabled. The input
states are stored in GPIO1 and GPIO0 (0x0E, D2 and
D0). Set GPIO1OUT/GPIO0OUT to 1 when using GPIO1/
GPIO0 as an input.
Staggered Parallel Outputs
The deserializer staggers the parallel data outputs to
reduce EMI and noise. Staggering outputs also reduces
the power-supply transient requirements. By default, the
deserializer staggers outputs according to Table 12.
Disable output staggering through the DISSTAG bit
(0x08, D3).
MAX9272 FEATURE
GMSL DESERIALIZER
HSYNC/VSYNC encoding
If feature not supported in the serializer, must be turned off in the deserializer.
Hamming-code error correction
If feature not supported in the serializer, must be turned off in the deserializer.
I2C-to-I2C
If feature not supported in the serializer, must use UART-to- I2C or UART-to-UART.
CRC error detection
If feature not supported in the serializer, must be turned off in the deserializer.
Double output
If feature not supported in the serializer, the data is inputted as a single word at 1/2 the output
frequency.
Coax
If feature not supported in the deserializer, must connect unused serial output through 200nF
and 50I in series to AVDD and set the reverse control-channel amplitude to 100mV.
I2S encoding
If feature is supported in the serializer, must disable I2S in the serializer.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9272GTM/V+ | 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9272GTM/V+T | 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9272GTM+ | 功能描述:串行器/解串器 - Serdes 1.5Gbps 28-bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9272GTM+T | 功能描述:串行器/解串器 - Serdes 1.5Gbps 28Bit Coax/STP deserializr RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9272GTV+ | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:28-Bit GMSL Deserializer for Coax or STP Cable |
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