參數(shù)資料
型號(hào): MAX9247EVKIT+
廠商: Maxim Integrated Products
文件頁數(shù): 7/17頁
文件大?。?/td> 0K
描述: EVAL KIT FOR MAX9247
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,串行器
已用 IC / 零件: MAX9247
已供物品:
MAX9247
27-Bit, 2.5MHz-to-42MHz
DC-Balanced LVDS Serializer
______________________________________________________________________________________
15
2) Wait for at least tLOCK of MAX9247 (or 17100 x tT)
to get activity on the link
3) Power up the MAX9248
Power-Supply Circuits and Bypassing
The MAX9247 has isolated on-chip power domains. The
digital core supply (VCC) and single-ended input supply
(VCCIN) are isolated but have a common ground (GND).
The PLL has separate power and ground (VCCPLL and
PLLGND) and the LVDS input also has separate power
and ground (VCCLVDS and LVDSGND). The grounds are
isolated by diode connections. Bypass each VCC, VCCIN,
VCCPLL, and VCCLVDS pin with high-frequency, surface-
mount ceramic 0.1F and 0.001F capacitors in parallel
as close to the device as possible, with the smallest value
capacitor closest to the supply pin.
LVDS Output
The LVDS output is a current source. The voltage swing
is proportional to the termination resistance. The output
is rated for a differential load of 100
±1%.
Cables and Connectors
Interconnect for LVDS typically has a differential imped-
ance of 100
. Use cables and connectors that have
matched differential impedance to minimize impedance
discontinuities.
Twisted-pair and shielded twisted-pair cables offer
superior signal quality compared to ribbon cable and
tend to generate less EMI due to magnetic field cancel-
ing effects. Balanced cables pick up noise as common
mode, which is rejected by the LVDS receiver.
Board Layout
Separate the LVTTL/LVCMOS inputs and LVDS output
to prevent crosstalk. A four-layer PCB with separate lay-
ers for power, ground, and signals is recommended.
ESD Protection
The MAX9247 ESD tolerance is rated for IEC 61000-4-
2, Human Body Model, Machine Model, and ISO 10605
standards. IEC 61000-4-2 and ISO 10605 specify ESD
tolerance for electronic systems. The IEC 61000-4-2
discharge components are CS = 150pF and RD =
330
(Figure 16). For IEC 61000-4-2, the LVDS outputs
are rated for ±8kV Contact Discharge and ±15kV Air-
Gap Discharge. The Human Body Model discharge
components are CS = 100pF and RD = 1.5k
(Figure
17). For the Human Body Model, all pins are rated for
±3kV Contact Discharge. The ISO 10605 discharge
components are CS = 330pF and RD = 2k
(Figure
18). For ISO 10605, the LVDS outputs are rated for
±10kV contact and ±30kV air discharge. The Machine
Model discharge components are CS = 200pF and
RD = 0 (Figure 19).
CS
150pF
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
RD
330
Figure 16. IEC 61000-4-2 Contact Discharge ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
1M
RD
1.5k
CS
100pF
Figure 17. Human Body ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
RD
2k
CS
330pF
Figure 18. ISO 10605 Contact Discharge ESD Test Circuit
STORAGE
CAPACITOR
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
RD
0
CS
200pF
Figure 19. Machine Model ESD Test Circuit
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