- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1946 > MAX9224ETI+T (Maxim Integrated Products)IC DESERIALIZER LP 28-TQFN PDF資料下載
參數(shù)資料
| 型號： | MAX9224ETI+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DESERIALIZER LP 28-TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 功能： | 串行器/解串器 |
| 數(shù)據(jù)速率： | 220Mbps |
| 輸入類型： | 并聯(lián) |
| 輸出類型： | 并聯(lián) |
| 輸入數(shù)： | 1 |
| 輸出數(shù)： | 22 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-WFQFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 28-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
MAX9223/MAX9224
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
8
_______________________________________________________________________________________
Pin Description (MAX9223)
PIN
NAME
FUNCTION
1–12, 14, 15,
21–28
DIN13–DIN2,
DIN1, DIN0,
DIN21–DIN14
Single-Ended Parallel Data Inputs. The 22 data bits are loaded into the input latch on the rising
edge of PCLKIN. DIN[21:0] are 1.71V to 3.465V tolerant. Internally pulled down to GND.
13
PCLKIN
Parallel Clock Input. The rising edge of PCLKIN (typically the pixel clock) latches the parallel
data input. Internally pulled down to GND.
16
PWRDN
Power-Down Input. Pull PWRDN low to place the MAX9223 and MAX9224 in power-down mode.
Drive PWRDN high for normal operation. Internally pulled down to GND.
17
SDO-
Inverting LCDS Serial-Data Output
18
SDO+
Noninverting LCDS Serial-Data Output
19
GND
Ground
20
VDD
Core Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.
—
EP
Exposed Paddle. Connect EP to ground.
Pin Description (MAX9224)
PIN
NAME
FUNCTION
1, 7, 8, 10–28
DOUT21,
DOUT0, DOUT1,
DOUT2–DOUT20
Single-Ended Parallel Data Outputs. DOUT[21:0] are valid on the rising edge of PCLKOUT.
2VDDO
Output Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.
3
GND
Ground
4
SDI+
Noninverting LCDS Serial-Data Input
5
SDI-
Inverting LCDS Serial-Data Input
6VDD
Core Supply Voltage. Bypass to GND with 0.1F and 0.01F capacitors in parallel as close to
the device as possible, with the smallest value capacitor closest to the supply pin.
9
PCLKOUT
Parallel Clock Output. Parallel output data are valid on the rising edge of PCLKOUT (typically
the pixel clock).
—
EP
Exposed Paddle. Connect EP to ground.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9226ETE+T | IC DESERIALIZER LP 16-TQFN |
| MAX9235ETE+ | IC LVDS SERIALIZER 10BIT 16TQFN |
| MAX9238EUM+ | IC DESERIALIZER 21BIT 48TSSOP |
| MAX9246GUM/V+ | IC DESERIALIZER 21BIT 48TSSOP |
| MAX9247ETM+T | IC SERIALIZER LVDS 48-TQFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9224EVKIT | 制造商:Maxim Integrated Products 功能描述:22-BIT LOW-POWER 5MHZ TO 10MHZ SE - Rail/Tube |
| MAX9225 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:10-Bit, Low-Power, 10MHz-to-20MHz Serializer and Deserializer Chipset |
| MAX9225ETE | 制造商:Maxim Integrated Products 功能描述:10-BIT LOW-POWER 10MHZ TO 20MHZ S - Rail/Tube |
| MAX9225ETE+ | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
| MAX9225ETE+T | 功能描述:串行器/解串器 - Serdes RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64 |
發(fā)布緊急采購，3分鐘左右您將得到回復。