參數(shù)資料
型號(hào): MAX9210EUM+D
廠商: Maxim Integrated Products
文件頁數(shù): 6/17頁
文件大?。?/td> 0K
描述: IC DESERIALIZER PROG 48TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 39
功能: 解串器
數(shù)據(jù)速率: 1.785Gbps
輸入類型: LVDS
輸出類型: LVTTL,LVCMOS
輸入數(shù): 3
輸出數(shù): 21
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
MAX9210/MAX9214/MAX9220/MAX9222
Programmable DC-Balance
21-Bit Deserializers
14
______________________________________________________________________________________
Skew Margin (RSKM)
Skew margin (RSKM) is the time allowed for degrada-
tion of the serial data sampling setup and hold times by
sources other than the deserializer. The deserializer
sampling uncertainty is accounted for and does not
need to be subtracted from RSKM. The main outside
contributors of jitter and skew that subtract from RSKM
are interconnect intersymbol interference, serializer
pulse position uncertainty, and pair-to-pair path skew.
VCCO Output Supply and Power Dissipation
The outputs have a separate supply (VCCO) for interfacing
to systems with 1.8V to 5V nominal input logic levels. The
DC Electrical Characteristics table gives the maximum
supply current for VCCO = 3.6V with 8pF load at several
switching frequencies with all outputs switching in the
worst-case switching pattern. The approximate incremen-
tal supply current for VCCO other than 3.6V with the same
8pF load and worst-case pattern can be calculated using:
II = CTVI 0.5fC x 21 (data outputs)
+ CTVIfC x 1 (clock output)
where:
II = incremental supply current.
CT = total internal (CINT) and external (CL) load capaci-
tance.
VI = incremental supply voltage.
fC = output clock switching frequency.
The incremental current is added to (for VCCO
> 3.6V)
or subtracted from (for VCCO
< 3.6V) the DC Electrical
Characteristics table maximum supply current. The
internal output buffer capacitance is CINT = 6pF. The
worst-case pattern switching frequency of the data out-
puts is half the switching frequency of the output clock.
In the following example, the incremental supply current is
calculated for VCCO = 5.5V, fC = 34MHz, and CL = 8pF:
VI = 5.5V - 3.6V = 1.9V
CT = CINT + CL = 6pF + 8pF = 14pF
where:
II = CTVI 0.5FC x 21 (data outputs) + CTVIfC x 1 (clock
output).
II = (14pF x 1.9V x 0.5 x 34MHz x 21) + (14pF x 1.9V x
34MHz).
II = 9.5mA + 0.9mA = 10.4mA.
The maximum supply current in DC-balanced mode for
VCC = VCCO = 3.6V at fC = 34MHz is 106mA (from the
DC Electrical Characteristics table). Add 10.4mA to get
the total approximate maximum supply current at VCCO
= 5.5V and VCC = 3.6V.
If the output supply voltage is less than VCCO = 3.6V,
the reduced supply current can be calculated using the
same formula and method.
At high switching frequency, high supply voltage, and
high capacitive loading, power dissipation can exceed
the package power dissipation rating. Do not exceed
the maximum package power dissipation rating. See
the Absolute Maximum Ratings for maximum package
power dissipation capacity and temperature derating.
Rising- or Falling-Edge Output Strobe
The MAX9210/MAX9214 have a rising-edge output
strobe, which latches the parallel output data into the
next chip on the rising edge of RxCLK OUT. The
MAX9220/MAX9222 have a falling-edge output strobe,
which latches the parallel output data into the next chip
on the falling edge of RxCLK OUT. The deserializer out-
put strobe polarity does not need to match the serializ-
er input strobe polarity. A deserializer with rising or
falling edge output strobe can be driven by a serializer
with a rising edge input strobe.
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參數(shù)描述
MAX9210EUM-T 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
MAX9210EUM-TD 功能描述:串行器/解串器 - Serdes 21-Bit DC-Balanced Deserializer RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
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