
M
Programmable DC-Balanced
21-Bit Serializers
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
V
CC
to GND...........................................................-0.5V to +4.0V
LVDS Outputs (TxOUT_, TxCLK OUT_) to GND ...-0.5V to +4.0V
5V Tolerant LVTTL/LVCMOS Inputs
(TxIN_, TxCLK IN,
PWRDWN
) to GND ..............-0.5V to +6.0V
(DCB/NC) to GND ......................................-0.5V to (V
CC
+ 0.5V)
LVDS Outputs (TxOUT_, TxCLK OUT_)
Short to GND and Differential Short.......................Continuous
Continuous Power Dissipation (T
A
= +70°C)
48-Pin TSSOP (derate 16mW/°C above +70°C) ....... 1282mW
48-Lead QFN (derate 26.3mW/°C above +70°C)......2105mW
Storage Temperature Range.............................-65°C to +150°C
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100
Ω ±
1%,
PWRDWN
= high, DCB/NC = high or low, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25
°
C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Junction Temperature......................................................+150°C
ESD Protection
Human Body Model (R
D
= 1.5k
Ω
, C
S
= 100pF)
All Pins to GND..............................................................
±
2kV
IEC 61000-4-2 (R
D
= 330
Ω
, C
S
= 150pF)
Contact Discharge (TxOUT_, TxCLK OUT_) to GND....
±
8kV
Air Gap Discharge (TxOUT_, TxCLK OUT_) to GND..
±
15kV
ISO 10605 (R
D
= 2k
Ω
, C
S
= 330pF)
Contact Discharge (TxOUT_, TxCLK OUT_) to GND....
±
8kV
Air Gap Discharge (TxOUT_, TxCLK OUT_) to GND..
±
25kV
Lead Temperature (soldering, 10s).................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (TxIN_, TxCLK IN,
PWRDWN
, DCB/NC)
TxIN_, TxCLK IN,
PWRDWN
2.0
5.5
V
CC
+
0.3
+0.8
+20
-1.5
High-Level Input Voltage
V
IH
DCB/NC
2.0
V
Low-Level Input Voltage
Input Current
Input Clamp Voltage
LVDS OUTPUTS (TxOUT_, TxCLK OUT)
Differential Output Voltage
V
IL
I
IN
V
CL
-0.3
-20
V
μA
V
V
IN
= hi g h or l ow
P WRDWN
= hi g h or l ow
I
CL
= -18mA
-0.9
V
OD
Figure 1
250
350
450
mV
Change in V
OD
Between
Complementary Output States
Δ
V
OD
Figure 1
2
25
mV
Output Offset Voltage
Change in V
OS
Between
Complementary Output States
V
OS
Figure 1
1.125
1.25
1.375
V
Δ
V
OS
Figure 1
10
30
mV
V
OUT+
or V
OUT-
= 0V or V
CC,
non-DC-balanced mode
-10
±5.7
+10
Output Short-Circuit Current
I
OS
V
OUT+
or V
OUT-
= 0V or V
CC
,
DC-balanced mode
-15
±8.2
+15
mA
V
OD
= 0V, non-DC-balanced mode
(Note 3)
V
OD
= 0V, DC-balanced mode (Note 3)
5.7
10
Magnitude of Differential Output
Short-Circuit Current
I
OSD
8.2
110
110
410
410
15
147
150
547
564
mA
78
78
292
292
DC-balanced mode
-40°C to +105°C
Differential Output Resistance
R
O
Non-DC-balanced
mode
-40°C to +105°C
Ω
Output High-Impedance Current
I
OZ
PWRDWN
= low or V
CC
= 0V,
V
OUT+
= 0V or 3.6V, V
OUT-
= 0V or 3.6V
-0.5
±0.1
+0.5
μA