(V
參數(shù)資料
型號(hào): MAX9205EAI+
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 6/13頁(yè)
文件大?。?/td> 0K
描述: IC SERIALIZER LVDS 28-SSOP
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 46
功能: 串行器
數(shù)據(jù)速率: 400Mbps
輸入類(lèi)型: LVTTL/LVCMOS
輸出類(lèi)型: LVDS
輸入數(shù): 10
輸出數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1424 (CN2011-ZH PDF)
MAX9205/MAX9207
10-Bit Bus LVDS Serializers
2
Maxim Integrated
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VAVCC = VDVCC = +3.0V to +3.6V, RL = 27 ±1% or 50 ±1%, CL = 10pF, TA = -40°C to +85°C. Typical values are at VAVCC =
VDVCC = +3.3V and TA = +25°C, unless otherwise noted.) (Notes 2, 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
AVCC, DVCC to GND..........................……………-0.3V to +4.0V
IN_, SYNC1, SYNC2, EN, TCLK_R/F, TCLK,
PWRDN to GND......................................-0.3V to (VCC + 0.3V)
OUT+, OUT- to GND .............................................-0.3V to +4.0V
Output Short-Circuit Duration.....................................Continuous
Continuous Power Dissipation (TA = +70°C)
28-Pin SSOP (derate 9.5mW/°C above +70°C) ..........762mW
Storage Temperature Range .............................-65°C to +150°C
Junction Temperature ......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
ESD Protection (Human Body Model, OUT+, OUT-) ...........±8kV
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVCMOS/LVTLL LOGIC INPUTS (IN0 TO IN9, EN, SYNC1, SYNC2, TCLK, TCLK_R/
F, PWRDN)
High-Level Input Voltage
VIH
2.0
VCC
V
Low-Level Input Voltage
VIL
GND
0.8
V
Input Current
IIN
VIN_ = 0V or V_VCC
-20
+20
A
BUS LVDS OUTPUTS (OUT+, OUT-)
RL = 27
200
286
400
mV
Differential Output Voltage
VOD
Figure 1
RL = 50
250
460
600
mV
Change in VOD Between
Complementary Output States
VOD
Figure 1
1
35
mV
Output Offset Voltage
VOS
Figure 1
0.9
1.15
1.3
V
Change in VOS Between
Complementary Output States
VOS
Figure 1
3
35
mV
Output Short-Circuit Current
IOS
VOUT+ or VOUT- = 0V,
IN0 to IN9 =
PWRDN = EN = high
-13
-15
mA
Output High-Impedance Current
IOZ
VPWRDN or VEN = 0.8V,
VOUT+ or VOUT- = 0V or V_VCC
-10
+10
A
Power-Off Output Current
IOX
V_VCC = 0V, VOUT+ or VOUT- = 0V or 3.6V
-10
+10
A
POWER SUPPLY
16MHz
23
35
MAX9205
40MHz
34
45
40MHz
32
50
Supply Current
ICC
RL = 27_ or 50_
worst-case pattern
(Figures 2, 4)
MAX9207
66MHz
45
60
mA
Power-Down Supply Current
ICCX
PWRDN = low
8
mA
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
SSOP
Junction-to-Ambient Thermal Resistance (
θJA)...............68°C/W
Junction-to-Case Thermal Resistance (
θJC)......................25°C/W
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