參數(shù)資料
型號: MAX9175EUB
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 時鐘及定時
英文描述: 670MHz LVDS-to-LVDS and Anything-to-LVDS 1:2 Splitters
中文描述: LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO10
封裝: MO-187C-BA, MICROMAX-10
文件頁數(shù): 4/14頁
文件大?。?/td> 224K
代理商: MAX9175EUB
M
670MHz LVDS-to-LVDS and Anything-to-LVDS
1:2 Splitters
4
_______________________________________________________________________________________
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, R
L
= 100
±1%, C
L
= 5pF, differential input voltage |V
ID
| = 0.15V to 1.2V, MAX9174 input common-mode volt-
age, V
CM
= |V
ID
/2| to (2.4V - |V
ID
/2|), MAX9175 input common-mode voltage V
CM
= |V
ID
/2| to (V
CC
- |V
ID
/2|),
PD_
= high, T
A
= -40
°
C
to +85
°
C, unless otherwise noted. Typical values are at V
CC
= +3.3V, |V
ID
| = 0.2V, V
CM
= +1.25V, T
A
= +25
°
C.) (Notes 5, 6, 7)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
High-to-Low Propagation Delay
Low-to-High Propagation Delay
Added Deterministic Jitter
Added Random Jitter
Pulse Skew
t
PLH
- t
PHL
Output-to-Output Skew
t
PHL
t
PLH
t
DJ
t
RJ
t
SKP
t
SKOO
t
SKPP1
t
SKPP2
t
R
t
F
t
PD
Figures 4, 5
Figures 4, 5
Figures 4, 5 (Note 8)
Figures 4, 5
Figures 4, 5
Figure 6
Figures 4, 5 (Note 9)
Figures 4, 5 (Note 10)
Figures 4, 5
Figures 4, 5
Figures 7, 8
PD0
,
PD1
= L
H, Figures 7, 8
PD0
= H,
PD1
= L
H, Figures 7, 8
PD1
= H,
PD0
L
H, Figures 7, 8
Figures 4, 5,
V
OD
250mV
(Note 11)
1.33
1.33
2.38
2.39
3.23
3.23
80
1.0
141
45
1.3
1.9
365
365
13
35
103
103
ns
ns
ps
(P-P)
ps
(RMS)
ps
ps
10
14
0.4
Part-to-Part Skew
ns
Rise Time
Fall Time
Power-Down Time
110
110
257
252
10
18
92
92
ps
ps
ns
μs
Power-Up Time
t
PU
ns
Maximum Data Rate
D
RMAX
800
Mbps
Maximum Switching Frequency
f
MAX
Figures 4, 5,
V
OD
250mV (Note 11)
f
IN
= 670MHz
f
IN
= 155MHz
D
R
= 800Mbps, 2
23
- 1 PRBS input
670
MHz
55
35
37
65
44
46
Switching Supply Current
I
CCSW
mA
PRBS Supply Current
I
CCPR
mA
Note 1:
Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, V
ID
, V
OD
, and
V
OD
.
Note 2:
Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are 100% tested at
T
A
= +25
°
C.
Note 3:
Tolerance on all external resistors (including figures) is ±1%.
Note 4:
Guaranteed by design.
Note 5:
AC parameters are guaranteed by design and characterization and are not production tested. Limits are set at ±6 sigma.
Note 6:
C
L
includes scope probe and test jig capacitance.
Note 7:
Pulse-generator output for differential inputs IN+, IN- (unless otherwise noted): f = 670MHz, 50% duty cycle, R
O
= 50
, t
R
=
700ps, and t
F
= 700ps (0% to 100%). Pulse-generator output for single-ended inputs
PD0
,
PD1
: t
R
= t
F
= 1.5ns (0.2V
CC
to
0.8V
CC
), 50% duty cycle, V
OH
= V
CC
+ 1.0V settling to V
CC
, V
OL
= -1.0V settling to zero, f = 10kHz.
Note 8:
Pulse-generator output for t
DJ
: |V
OD
| = 0.15V, V
OS
= 1.25V, data rate 800Mbps, 2
23
- 1 PRBS, R
O
= 50
, t
R
= 700ps, and t
F
= 700ps (0% to 100%).
Note 9:
t
SKPP1
is the magnitude of the difference of any differential propagation delays between devices operating under identical
conditions.
Note 10:
t
SKPP2
is the magnitude of the difference of any differential propagation delays between devices operating over rated con-
ditions.
Note 11:
Meets all AC specifications.
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參數(shù)描述
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