參數(shù)資料
型號: MAX9153EUI+
廠商: Maxim Integrated Products
文件頁數(shù): 1/11頁
文件大?。?/td> 0K
描述: SEMICONDUCTOR OTHER
標(biāo)準(zhǔn)包裝: 50
系列: *
General Description
The MAX9153/MAX9154 low-jitter, low-voltage differential
signaling (LVDS) repeaters are ideal for applications that
require high-speed data or clock distribution while mini-
mizing power, space, and noise. The devices accept a
single LVDS input (MAX9153) or single LVPECL input
(MAX9154) and repeat the signal at 10 LVDS outputs.
Each differential output drives 100
Ω, allowing point-to-
point distribution of signals on transmission lines with
100
Ω termination at the receiver input.
Ultra-low 90psp-p (max) added deterministic jitter and
1psRMS (max) added random jitter ensure reliable com-
munication in high-speed links that are highly sensitive to
timing error, especially those incorporating clock-and-
data recovery or serializers and deserializers. The high-
speed switching performance guarantees 800Mbps data
rate and less than 60ps (max) skew between channels
while operating from a single +3.3V supply.
Supply current at 800Mbps is 118mA and reduces to
2A in power-down mode. LVDS inputs and outputs con-
form to the ANSI/EIA/TIA -644 standard. A fail-safe fea-
ture on the MAX9153 sets the output high when the input
is undriven and open, terminated, or shorted. The
MAX9153/MAX9154 are available in a 28-pin TSSOP
package and are specified for the -40°C to +85°C
extended temperature range.
Refer to the MAX9150 data sheet for a pin-compatible
10-port LVDS repeater capable of driving a double-termi-
nated (50
Ω) LVDS link.
Refer to the MAX9110/MAX9112 and MAX9111/MAX9113
data sheets for LVDS line drivers and receivers.
Applications
Cellular Phone Base-Stations
Add/Drop Muxes
Digital Cross-Connects
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Features
Ultra-Low 90psp-p (max) Added Deterministic
Jitter at 800Mbps (223-1) PRBS Pattern
1psRMS (max) Added Random Jitter
60ps (max) Skew Between Channels
Guaranteed 800Mbps Data Rate
LVDS (MAX9153) or LVPECL (MAX9154) Input
Versions
Fail-Safe Circuit Sets Output High for Undriven
Inputs (MAX9153)
High-Impedance Differential Input when VCC = 0
2A Power-Down Supply Current
Conforms to ANSI/EIA/TIA-644 LVDS Standard
Pin-Compatible Upgrade to DS90LV110
MAX9153/MAX9154
Low-Jitter, 800Mbps, 10-Port LVDS
Repeaters with 100
Ω Drive
________________________________________________________________ Maxim Integrated Products
1
19-2167; Rev 0; 10/01
Ordering Information
PART
TEMP.
RANGE
PIN-
PACKAGE
INPUT
MAX9153EUI
-40°C to +85°C
28 TSSOP
LVDS
MAX9154EUI
-40°C to +85°C
28 TSSOP
LVPECL
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Pin Configuration appears at end of data sheet.
100
Ω
LVDS
BACKPLANE
OR CABLE
1
10
100
Ω
100
Ω
MAX9153
MAX9154
RX
MAX9111
TX
MAX9110
*
*(LVPECL INPUT FOR MAX9154)
Typical Application Circuit
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