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參數(shù)資料
| 型號： | MAX9112ESA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DRVR DUAL LVDS 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 驅(qū)動器 |
| 驅(qū)動器/接收器數(shù)： | 2/0 |
| 規(guī)程： | LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
6
_______________________________________________________________________________________
V OS
VCC
GND
DIN_
RL/2
VOS
VOD
DO_-
DO_+
Figure 1. LVDS Transmitter VOD and VOS Test Circuit
RL
CL
DO_ +
DO_ -
CL
50
Ω
DIN_
GENERATOR
Figure 2. Transmitter Propagation Delay and Transition Time
Test Circuit
stage presents a symmetrical, high-impedance output,
reducing differential reflection and timing distortion. The
driver outputs are short circuit current limited and enter a
high-impedance state when the device is not powered.
LVDS Operation
The LVDS interface standard is a signaling method
intended for point-to-point communication over a con-
trolled impedance medium as defined by the EIA/TIA-
644 LVDS standard. The LVDS standard uses a lower
voltage swing than other common communication stan-
dards, achieving higher data rates with reduced power
consumption while reducing EMI emissions and system
susceptibility to noise.
LVDS transmitters such as the MAX9110/MAX9112
convert CMOS/LVTTL signals to low-voltage differential
signals at rates in excess of 500Mbps. The MAX9110/
MAX9112 current-steering architecture requires a resis-
tive load to terminate the signal and complete the trans-
mission loop. Because the device switches the direc-
tion of current flow and not voltage levels, the actual
output voltage swing is determined by the value of the
termination resistor at the input of an LVDS receiver.
Logic states are determined by the direction of current
flow through the termination resistor. With a typical
3.5mA output current, the MAX9110/MAX9112 produce
an output voltage of 350mV when driving a 100
Ω load.
The steady-state-voltage peak-to-peak swing is twice
the differential voltage, or 700mV (typ).
Applications Information
Supply Bypassing
Bypass VCC with high-frequency surface-mount ceramic
0.1F and 0.001F capacitors in parallel, as close to the
device as possible, with the smaller valued capacitor the
closest. For additional supply bypassing, place a 10F
tantalum or ceramic capacitor at the point where power
enters the circuit board.
0
VOH
VOL
DIN_
DO_ -
DO_+
VDIFF
3V
tPHLD
1.5V
0
tTHL
20%
0
80%
0
tTLH
20%
0V DIFFERENTIAL
tPLHD
1.5V
VDIFF = VDO_+ - VDO_-
Figure 3. Transmitter Propagation Delay and Transition Time Waveforms
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX9113 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 |
| MAX9113ASA/V+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX9113ASA/V+T | 制造商:Maxim Integrated Products 功能描述:- Tape and Reel |
| MAX9113EKA | 制造商:Maxim Integrated Products 功能描述:SINGLE / DUAL LVDS LINE RECEIVER WITH ULTRA-L - Rail/Tube |
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