參數(shù)資料
型號(hào)： MAX8893CEWV+
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA30
封裝： 3 X 2.50 MM, 0.64 MM HEIGHT, ROHS COMPLIANT, WLP-30
文件頁(yè)數(shù)： 27/51頁(yè)
文件大?。?/td> 4976K
代理商： MAX8893CEWV+
PMICs for Multimedia Application Processors
in a 3.0mm x 2.5mm WLP
MAX8893A/MAX8893B/MAX8893C
______________________________________________________________________________________ 33
Acknowledge
The acknowledge bit is used by the recipient to hand-
shake the receipt of each byte of data (Figure 11). After
data transfer, the master generates the acknowledge
clock pulse and the recipient pulls down the SDA line
during this acknowledge clock pulse, such that the SDA
line stays low during the high duration of the clock pulse.
When the master transmits the data to the MAX8893A/
MAX8893B/MAX8893C, it releases the SDA line and the
MAX8893A/MAX8893B/MAX8893C take the control of
the SDA line and generate the acknowledge bit. When
SDA remains high during this 9th clock pulse, this is
defined as the not acknowledge signal. The master
can then generate either a STOP condition to abort the
transfer, or a REPEATED START condition to start a new
transfer.
Write Operation
The MAX8893A/MAX8893B/MAX8893C recognize the
write-byte protocol as defined in the SMBus specifica-
tion and shown in section A of Figure 12. The write-byte
protocol allows the I2C master device to send 1 byte of
data to the slave device. The write-byte protocol requires
a register pointer address for the subsequent write.
The MAX8893A/MAX8893B/MAX8893C acknowledge
any register pointer even though only a subset of those
registers actually exists in the device. The write-byte
protocol is as follows:
1) The master sends a start command.
2) The master sends the 7-bit slave address followed by
a write bit (0x7C).
3) The addressed slave asserts an acknowledge by
pulling SDA low.
4) The master sends an 8-bit register pointer.
5) The slave acknowledges the register pointer.
6) The master sends a data byte.
7) The slave updates with the new data.
8) The slave acknowledges the data byte.
9) The master sends a STOP condition.
In addition to the write-byte protocol, the MAX8893A/
MAX8893B/MAX8893C can write to multiple registers as
shown in section B of Figure 12. This protocol allows the
I2C master device to address the slave only once and
then send data to a sequential block of registers starting
at the specified register pointer.
Use the following procedure to write to a sequential
block of registers:
1)
The master sends a start command.
2)
The master sends the 7-bit slave address followed
by a write bit (0x7C).
3)
The addressed slave asserts an acknowledge by
pulling SDA low.
4)
The master sends the 8-bit register pointer of the
first register to write.
5)
The slave acknowledges the register pointer.
6)
The master sends a data byte.
7)
The slave updates with the new data.
8)
The slave acknowledges the data byte.
9)
Steps 6 to 8 are repeated for as many registers in
the block, with the register pointer automatically
incremented each time.
10) The master sends a STOP condition.
Figure 11. Acknowledge
SMBus is a trademark of Intel Corp.
SDA BY MASTER
SDA BY SLAVE
SCL
1
2
8
9
ACKNOWLEDGE
CLOCK PULSE FOR
ACKNOWLEDGEMENT
D7
D6
D0
START CONDITION
NOT ACKNOWLEDGE
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