參數(shù)資料
型號: MAX8884YEREKE+T
廠商: Maxim Integrated
文件頁數(shù): 3/17頁
文件大?。?/td> 579K
描述: IC REG TRPL BCK/LINEAR 16UCSP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
拓撲: 降壓(降壓)同步(1),線性(LDO)(2)
功能: 任何功能
輸出數(shù): 3
頻率 - 開關(guān): 2MHz
電壓/電流 - 輸出 1: 1.2 V/1.8 V,700mA
電壓/電流 - 輸出 2: 1.2 V/1.8 V,300mA
電壓/電流 - 輸出 3: 1.2 V/1.8 V,300mA
帶 LED 驅(qū)動器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 16-UCSP(4x4)
包裝: 帶卷 (TR)
700mA DC-DC Step-Down Converters
with Dual 300mA LDO in 2mm x 2mm CSP
_______________________________________________________________________________________ 3
PARAMETER
CONDITIONS
MIN   TYP   MAX  UNITS
T
A
= +25癈
     0.1     1
LX Leakage Current
V
IN1A
 = V
IN1B
 = V
IN2
= 5.5V,
V
LX
 = 0
T
A
= +85癈
     1     
礎(chǔ)
p-Channel MOSFET Peak Current
Limit
V
LX
 = 0
0.8    1.0    1.2     A
n-Channel MOSFET Valley
Current Limit
 
0.6    0.8    1.0     A
MAX8884Y_
     40     
n-Channel MOSFET
Zero-Crossing Threshold
MAX8884Z_
     60     
mA
Minimum On-Time
 
    0.07          祍
Minimum Off-Time
 
    0.06          祍
Power-Up Delay
From V
BUCK_EN
 rising to V
LX
 rising
     120    250    祍
LDO1, LDO2
SEL = AGND
1.764   1.800   1.836
Output Voltage V
LDO1
V
IN2
 = 5.5V, I
LDO_
= 1mA;
V
IN2
 = 3.4V, I
LDO_
= 100mA
SEL = IN1_
    2.800    
V
Output Voltage V
LDO2
V
IN2
 = 5.5V, I
LDO_
= 1mA;
V
IN2
 = 3.4V, I
LDO_
= 100mA
2.770   2.800   2.830    V
Output Current
 
300     
     mA
Current Limit
V
LDO_
 = 0
310    450    750    mA
Dropout Voltage
I
LDO_
= 100mA, T
A
= +25癈 (V
LDO_
 2.5V)
     70    200    mV
Line Regulation
V
IN2
stepped from 3.5V to 5.5V, I
LDO_
 = 100mA
     2.4          mV
Load Regulation
I
LDO_
 stepped from 50礎(chǔ) to 200mA
     25          mV
Power-Supply Rejection
V
LDO_
/V
IN2
10Hz to 100kHz, V
LDO_
 = 1.8V,
C
LDO_
 = 2.2礔, I
LDO_
 = 30mA
     65          dB
Output Noise
10Hz to 100kHz, V
LDO_
 = 1.8V,
C
LDO_
 = 2.2礔, I
LDO_
 = 30mA
     26         礦
RMS
0 < I
LDO_
 < 10mA
     0.1     
10mA < I
LDO_
 < 200mA
     1     
Output Capacitor for Stable
Operation
200mA < I
LDO_
 < 300mA
     2.2     
Shutdown Output Impedance    V
LDO1_EN
 = V
LDO2_EN
 = 0
     100     
Power-Up Delay
From V
LDO_EN
 rising to V
LDO_
 output rising
     150    250    祍
REFBP
REFBP Output Voltage
0 I
REFBP
 1礎(chǔ)
1.237   1.250   1.263    V
REFBP Supply Rejection
V
IN2
 stepped from 2.55V to 5.5V
     0.2     5     mV
ELECTRICAL CHARACTERISTICS (continued)
(V
IN1A
= V
IN1B
= V
IN2
= V
LDO1_EN
= V
LDO2_EN
= V
BUCK_EN
= 3.6V. T
A
= -40癈 to +85癈, typical values are at T
A
= +25癈, unless
otherwise noted.) (Note 1)
Note 1:All devices are 100% production tested at T
A
= +25癈. Limits over the operating temperature range are guaranteed by
design.
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