I2C Port Expander with Eight Push-Pull Outputs and Eight Inputs ________" />
參數(shù)資料
型號(hào): MAX7324AEG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 7/20頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 24QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 帶卷 (TR)
包括: POR
MAX7324
I2C Port Expander with Eight Push-Pull Outputs
and Eight Inputs
______________________________________________________________________________________
15
Applications Information
Port Input and I2C Interface Level
Translation from Higher or Lower
Logic Voltages
SDA, SCL, AD0, AD2, RST, INT, and I0–I7 are overvolt-
age protected to +6V. This allows the MAX7324 to
operate from a lower supply voltage, such as +3.3V,
while the I2C interface and/or any of the eight input
ports are driven from a higher logic level, such as +5V.
The MAX7324 can operate from a higher supply volt-
age, such as +3V, while the I2C interface and/or some
of the input ports I0–I7 are driven from a lower logic
level, such as +2.5V. For V+ < 1.8V, apply a minimum
voltage of 0.8 x V+ to assert a logic-high on any input.
For V+ ≥ 1.8V, apply a voltage of 0.7 x V+ to assert a
logic-high. For example, a MAX7324 operating from a
+5V supply may not recognize a +3.3V nominal logic
high. One solution for input level translation is to drive
the MAX7324 inputs from open-drain outputs. Use a
pullup resistor to V+ or a higher supply to ensure a high
logic voltage greater than 0.7 x V+.
Port Output Signal Level Translation
RST, SCL, SDA, AD0, and AD2 remain high impedance
with up to +6V asserted on them when the MAX7324 is
powered down (V+ = 0). The MAX7324 can therefore
be used in hot-swap applications.
Each of the eight output ports has protection diodes to
V+ and GND. When a port output is driven to a voltage
higher than V+ or lower than GND, the appropriate pro-
tection diode clamps the output to a diode drop above
V+ or below GND. When the MAX7324 is powered
down (V+ = 0), every output port's protection diodes to
V+ and GND continue to appear as a diode clamp from
each output to GND (Figure 11).
Each of the input ports I0–I7 has a protection diode to
GND (Figure 12). When a port input is driven to a volt-
age lower than GND, the protection diode clamps the
voltage to a diode drop below GND.
Each of the eight input ports I0–I7 also has a 40k (typ)
pullup resistor that can be enabled or disabled. When a
port input is driven to a voltage higher than V+, the
body diode of the pullup enable switch conducts and
the 40k pullup resistor is enabled. When the
MAX7324 is powered down (V+ = 0), every input port
appears as a 40k resistor in series with a diode con-
nected to ground. Input ports are protected to +6V
under any of these circumstances.
Driving LED Loads
When driving LEDs from one of the eight output ports,
O8–O15, a resistor must be fitted in series with the LED to
limit the LED current to no more than 20mA. Connect the
LED cathode to the MAX7324 port, and the LED anode
to V+ through the series current-limiting resistor, RLED.
I0–I7
PULLUP
ENABLE
INPUT
40k
V+
MAX7324
Figure 12. MAX7324 Input Port Structure
OUTPUT
V+
GND
V+
O8–O15
MAX7324
Figure 11. MAX7324 Output Port Structure
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