of the I2C specification. Therefore, address inputs AD2 and AD0 that are connect" />
參數(shù)資料
型號(hào): MAX7319ATE+T
廠(chǎng)商: Maxim Integrated Products
文件頁(yè)數(shù): 14/16頁(yè)
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.71 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 16-TQFN-EP(3x3)
包裝: 帶卷 (TR)
of the I2C specification. Therefore, address inputs AD2
and AD0 that are connected to SDA or SCL normally
appear at power-up to be connected to V+. The pullup
selection logic uses AD0 to select whether pullups are
enabled for ports I3–I0, and uses AD2 to select whether
pullups are enabled for ports I7–I4. The rule is that a
logic-high SDA or SCL connection selects the pullups,
while a logic-low deselects the pullups (Table 3). The
pullup configuration is correct on power-up for a stan-
dard I2C configuration, where SDA and SCL are pulled
up to V+ by the external I2C pullup resistors.
There are circumstances where the assumption that
SDA = SCL = V+ on power-up is not true, for example,
in true hot-swap applications, in which there is legiti-
mate bus activity during power-up. Also, if SDA and
SCL are terminated with pullup resistors to a different
supply voltage than the MAX7319’s supply voltage, and
if that pullup supply rises later than the MAX7319’s sup-
ply, then SDA or SCL may appear at power-up to be
connected to GND. In such applications, use the four
address combinations that are selected by connecting
address inputs AD2 and AD0 to V+ or GND (shown in
bold in Table 3). These selections are guaranteed to be
correct at power-up, independent of SDA and SCL
behavior. If one of the other 12 address combinations is
used, be aware that an unexpected combination of
pullups might be asserted until the first I2C transmis-
sion (to any device, not necessarily the MAX7319) is
put on the bus.
Port Inputs
Port inputs switch at CMOS logic levels as determined
by the expander’s supply voltage, and are overvoltage
tolerant to +6V, independent of the expander’s supply
voltage.
Port-Input Transition Detection
All eight input ports are monitored for changes since
the expander was last accessed through the serial
interface. The state of the input ports is stored in an
internal “snapshot” register for transition monitoring.
The snapshot is continuously compared with the actual
input conditions, and if a change is detected for any
port input, an internal transition flag is set for that port.
The eight port inputs are sampled (internally latched
into the snapshot register) and the old transition flags
cleared during the I2C acknowledge of every MAX7319
read and write access. The previous port transition
flags are read through the serial interface as the sec-
ond byte of a 2-byte read sequence.
MAX7319
I2C Port Expander with Eight Inputs and
Maskable Transition Detection
_______________________________________________________________________________________
7
PART
I2C SLAVE
ADDRESS
INPUTS
INTERRUPT
MASK
OPEN-
DRAIN
OUTPUTS
PUSH-
PULL
OUTPUTS
I2C DATA WRITE
I2C DATA READ
MAX7319
110xxxx
8
Yes
<I7–I0 interrupt
mask>
<I7–I0 port inputs>
<I7–I0 transition flags>
MAX7320
101xxxx
8
<O7–O0 port
outputs>
<O7–O0 port inputs>
MAX7321
110xxxx
Up to 8
Up to 8
<P7–P0 port
outputs>
<P7–P0 port inputs>
<P7–P0 transition flags>
MAX7322
110xxxx
4
Yes
4
<O7, O6 outputs,
I5–I2 interrupt
mask, O1, O0
outputs>
<O7, O6, I5–I2, O1, O0 port
inputs>
<0, 0, I5–I2 transition flags,
0, 0>
MAX7323
110xxxx
Up to 4
Up to 4
4
<port outputs>
<O7, O6, P5–P2, O1, O0 port
inputs>
<0, 0, P5–P2 transition flags,
0, 0>
MAX7328
0100xxx
Up to 8
Up to 8
<P7–P0 port
outputs>
<P7–P0 port inputs>
MAX7329
0111xxx
Up to 8
Up to 8
<P7–P0 port
outputs>
<P7–P0 port inputs>
Table 2. Read and Write Access to Eight-Port Expander Family
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