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參數(shù)資料
型號: MAX7310AUE+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/15頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 16-TSSOP
包裝: 帶卷 (TR)
包括: POR
Detailed Description
The MAX7310 general-purpose input/output (GPIO)
peripheral provides up to eight I/O ports, controlled
through an I2C-compatible serial interface. The
MAX7310 consists of an input port register, an output
port register, a polarity inversion register, a configura-
tion register, and a bus timeout register. An active-low
reset input sets the eight I/O lines as inputs. Three
slave ID address select pins (AD0, AD1, and AD2)
choose one of 56 slave ID addresses (Figure 1).
MAX7310
2-Wire-Interfaced 8-Bit I/O Port Expander
with Reset
_______________________________________________________________________________________________________
5
Pin Description
PIN
TSSOP/
QSOP
THIN
QFN
NAME
FUNCTION
1
15
SCL
Serial Clock Line
2
16
SDA
Serial Data Line
3
1
AD0
Address Input 0
4
2
AD1
Address Input 1
5
3
AD2
Address Input 2
6
4
I/O0
Input/Output Port 0 (Open Drain)
7
5
I/O1
Input/Output Port 1
8
6
GND
Supply Ground
9–14
7–12
I/O2–I/O7
Input/Output Port 2—Input/Output Port 7
15
13
RESET
External Reset (Active Low). Pull RESET low to configure I/O pins as inputs. Set RESET
high for normal operation.
16
14
V+
Supply Voltage. Bypass with a 0.047F capacitor to GND.
PAD
Exposed
pad
Exposed Pad on Package Underside. Connect to GND.
Figure 1. MAX7310 Block Diagram
AD0
AD1
AD2
SCL
SDA
SMBus
CONTROL
INPUT
FILTER
POWER-ON
RESET
GND
V+
INPUT/
OUTPUT
PORTS
WRITE PULSE
READ PULSE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
8 BIT
N
MAX7310
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相關代理商/技術參數(shù)
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