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參數(shù)資料
| 型號： | MAX6732UTSDD6-T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | Discrete IGBTs; Surface Mount Type: N; Package: TO-3P(LH); Number Of Pins: 3; No Of Circuits: 2; Comments: Non isolation package; V_CES (V): (max 900) |
| 中文描述： | 3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO6 |
| 封裝： | MO-178AB, SOT-23, 6 PIN |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 244K |
| 代理商： | MAX6732UTSDD6-T |
M
The RSTIN comparator derives power from V
CC
1, and
the input voltage must remain less than or equal to
V
CC
1. Low leakage current at RSTIN allows the use of
large-valued resistors, resulting in reduced power con-
sumption of the system.
Watchdog
The watchdog feature monitors μP activity through
the watchdog input (WDI). A rising or falling edge on
WDI within the watchdog timeout period (t
WD
) indi-
cates normal μP operation.
WDO
asserts low if WDI
remains high or low for longer than the watchdog
timeout period. Floating WDI does not disable the
watchdog timer.
The MAX6730
–
MAX6735 include a dual-mode watch-
dog timer to monitor μP activity. The flexible timeout
architecture provides a long-period initial watchdog
mode, allowing complicated systems to complete
lengthy boots, and a short-period normal watchdog
mode, allowing the supervisor to provide quick alerts
when processor activity fails. After each reset event
(V
CC
power-up, brownout, or manual reset), there is a
long initial watchdog period of 35s (min). The long
watchdog period mode provides an extended time for
the system to power up and fully initialize all μP and
system components before assuming responsibility for
routine watchdog updates.
The usual watchdog timeout period (1.12s min) begins
after the initial watchdog timeout period (t
WD-L
) expires
or after the first transition on WDI (Figure 3). During nor-
mal operating mode, the supervisor asserts the
WDO
output if the μP does not update the WDI with a valid
transition (high to low or low to high) within the standard
timeout period (t
WD-S
) (1.12s min).
Connect
MR
to
WDO
to force a system reset in the
event that no rising or falling edge is detected at WDI
within the watchdog timeout period.
WDO
asserts low
when no edge is detected by WDI, the
RST
output
asserts low, the watchdog counter immediately clears,
and
WDO
returns high. The watchdog counter restarts,
using the long watchdog period, when the reset timeout
period ends (Figure 4).
Ensuring a Valid RESET
Output Down to V
CC
= 0
The MAX6730
–
MAX6735 guarantee proper operation
down to V
CC
= +0.8V. In applications that require valid
reset levels down to V
CC
= 0, use a 100k
pulldown
resistor from
RST
to GND. The resistor value used is not
critical, but it must be large enough not to load the
reset output when V
CC
is above the reset threshold. For
most applications, 100k
is adequate. Note that this
configuration does not work for the open-drain outputs
of MAX6730/MAX6732/MAX6734.
Single-/Dual-/Triple-Voltage μP Supervisory
Circuits with Independent Watchdog Output
10
______________________________________________________________________________________
t
RP
V
TH
V
CC
(MIN)
V
CC
1,
V
CC
2
RSTIN
RST
WDO
WDI
<t
WD-S
<t
WD-S
>t
WD-S
t
WD-S
<t
WD-S
<t
WD-S
<t
WD-L
Figure 3. Watchdog Input/Output Timing Diagram (
MR
and
WDO
Not Connected)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX6732UTSFD1-T | Discrete IGBTs; Surface Mount Type: N; Package: TO-3P(LH); Number Of Pins: 3; No Of Circuits: 2; Comments: Non isolation package; V_CES (V): (max 1000) |
| MAX6732UTSFD2-T | Discrete IGBTs; Surface Mount Type: Y; Package: SOP-8; Number Of Pins: 8; No Of Circuits: 5th generation; Comments: 2.3 @V_GE=4V, I_C=150A; V_CES (V): (max 400) |
| MAX6732UTSFD3-T | Stepping Motor Driver ICs; Function: Driver; Vopmax (Vm*): (17V); Io (lpeak): ±100mA; Excitation: Full step; I/F: phase input (2-bit/phase); Mixed Decay Mode: no; Package: HSOP16; RoHS Compatible: yes |
| MAX6732UTSFD4-T | Stepping Motor Driver ICs; Function: Driver; Vopmax (Vm*): 30V (35V); Io (lpeak): 0.8A (1A); Excitation: 1/2 step; I/F: phase input (2-bit/phase); Mixed Decay Mode: no; Package: HSOP20; RoHS Compatible: yes |
| MAX6732UTSFD5-T | Stepping Motor Driver ICs; Function: Driver; Vopmax (Vm*): 35V (40V); Io (lpeak): 1.5A (1.8A); Excitation: 1/2 step; I/F: phase input (2-bit/phase); Mixed Decay Mode: included; Package: HSOP20; RoHS Compatible: yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6732UTSFD1 | 制造商:Maxim Integrated Products 功能描述:SINGLE-/DUAL-/TRIPLE-VOLTAGE MICROP - Rail/Tube |
| MAX6732UTSFD1+T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6732UTSFD1-T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6732UTSFD2 | 制造商:Maxim Integrated Products 功能描述:SINGLE-/DUAL-/TRIPLE-VOLTAGE MICROP - Rail/Tube |
| MAX6732UTSFD2+T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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