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MAX6715A–MAX6729A/MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 P
Supervisory Circuits
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3
ELECTRICAL CHARACTERISTICS (continued)
(VCC1 = 0.8V to 5.5V, VCC2 = 0.8V to 5.5V, GND = 0V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at TA =
+25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Reset Threshold Tempco
ΔVTH/°C
20
ppm/°C
Reset Threshold Hysteresis
VHYST
Referenced to VTH typical
0.5
%
VCC to Reset Output Delay
tRD
VCC1 = (VTH1+ 100mV) to (VTH1 - 100mV) or
VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV)
20
s
D1
1.1
1.65
2.2
D2
8.8
13.2
17.6
D7 (MAX6797A only)
17.5
26.25
35
D8 (MAX6797A only)
35
52.5
70
D3
140
210
280
D5
280
420
560
D6
560
840
1120
Reset Timeout Period
tRP
D4
1120
1680
2240
ms
ADJUSTABLE RESET COMPARATOR INPUT (MAX6719A/MAX6720A/MAX6723A–MAX6727A)
RSTIN Input Threshold
VRSTIN
611
626.5
642
mV
RSTIN Input Current
IRSTIN
-100
+100
nA
RSTIN Hysteresis
3mV
RSTIN to Reset Output Delay
tRSTIND
VRSTIN to (VRSTIN - 30mV)
22
s
POWER-FAIL INPUT (MAX6728A/MAX6729A)
PFI Input Threshold
VPFI
611
626.5
642
mV
PFI Input Current
IPFI
-100
+100
nA
PFI Hysteresis
VPFH
3mV
PFI to PFO Delay
tDPF
(VPFI + 30mV) to (VPFI - 30mV)
2
s
MANUAL-RESET INPUT (MAX6715A–MAX6722A/MAX6725A–MAX6729A)
VIL
0.3
VCC1
MR Input Voltage
VIH
0.7
VCC1
V
MR Minimum Pulse Width
1s
MR Glitch Rejection
100
ns
MR to Reset Delay
tMR
200
ns
MR Pullup Resistance
25
50
80
k
Ω
WATCHDOG INPUT (MAX6721A–MAX6729A)
First watchdog period after reset timeout
period
35
54
72
Watchdog Timeout Period
tWD
Normal mode
1.12
1.68
2.24
s
WDI Pulse Width
tWDI
(Note 2)
50
ns
VIL
0.3
VCC1
WDI Input Voltage
VIH
0.7
VCC1
V
WDI Input Current
IWDI
WDI = 0V or VCC1-1
+1
A