- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67809 > MAX6721AUTRHD3+T (MAXIM INTEGRATED PRODUCTS INC) Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits PDF資料下載
參數(shù)資料
| 型號： | MAX6721AUTRHD3+T |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| 中文描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO6 |
| 封裝： | ROHS COMPLIANT, SOT-23, 6 PIN |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 186K |
| 代理商： | MAX6721AUTRHD3+T |
MAX6715A–MAX6729A/MAX6797A
Dual/Triple, Ultra-Low-Voltage, SOT23 P
Supervisory Circuits
12
_
__
_
MAX6729A
VEXT
R1
R3
R2
PFI
GND
PFO
A
VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD
VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD
VOH = VCC1 (FOR PUSH-PULL PFO)
R2 = 50k
Ω (FOR > 10μA R2 CURRENT)
R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL)/VOH)/VPFI
R3 = (R1 x VOH)/(VGOOD - VFAIL)
VGOOD
VFAIL
VIN
PFO
Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO
Applications Information
Interfacing to Ps with Bidirectional
Reset Pins
Most Ps with bidirectional reset pins can interface
directly to open-drain RST output options. Systems
simultaneously requiring a push-pull RST output and a
bidirectional reset interface can be in logic contention.
To prevent contention, connect a 4.7kΩ resistor
between RST and the P’s reset I/O port as shown in
Figure 4.
Adding Hysteresis to the Power-Fail
Comparator
The power-fail comparator has a typical input hysteresis
of 3mV. This is sufficient for most applications where a
power-supply line is being monitored through an external
voltage-divider (see the
Power-Fail Comparator section).
If additional noise margin is desired, connect a resistor
between PFO and PFI as shown in Figure 5. Select the
values of R1, R2, and R3 so PFI sees VPFI (626mV) when
VEXT falls to its power-fail trip point (VFAIL) and when VIN
rises to its power-good trip point (VGOOD). The hysteresis
window extends between the specified VFAIL and VGOOD
thresholds. R3 adds the additional hysteresis by sinking
current from the R1/R2 divider network when PFO is
logic-low and sourcing current into the network when PFO
is logic-high. R3 is typically an order of magnitude greater
than R1 or R2.
The current through R2 should be at least 2.5A to ensure
that the 100nA (max) PFI input current does not signifi-
cantly shift the trip points. Therefore, R2 < VPFI/10A <
62kΩ for most applications. R3 will provide additional hys-
teresis for PFO push-pull (VOH = VCC1) or open-drain
(VOH = VPULLUP) applications.
Monitoring an Additional Power Supply
These P supervisors can monitor either positive or
negative supplies using a resistor voltage-divider to
PFI. PFO can be used to generate an interrupt to the P
or cause reset to assert (Figure 3).
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit shown in
Figure 3. When the negative supply is valid, PFO is low.
When the negative supply voltage drops, PFO goes
high. The circuit’s accuracy is affected by the PFI
threshold tolerance, VCC, R1, and R2.
Negative-Going VCC Transients
The MAX6715A–MAX6729A/MAX6797A supervisors are
relatively immune to short-duration negative-going VCC
transients (glitches). It is usually undesirable to reset
the P when VCC experiences only small glitches. The
Typical Operating Characteristics show Maximum
Transient Duration vs. Reset Threshold Overdrive, for
which reset pulses are not generated. The graph was
produced using negative-going VCC pulses, starting
above VTH and ending below the reset threshold by the
MAX6715A–
MAX6729A/
MAX6797A
GND
VCC1VCC2
VCC2
VCC1
RST
RESET TO OTHER SYSTEM COMPONENTS
RESET
μP
4.7k
Ω
Figure 4. Interfacing to Ps with Bidirectional Reset I/O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX6721AUTRHD4+T | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| MAX6721AUTRHD5+T | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| MAX6721AUTRHD6+T | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| MAX6721AUTRVD3+T | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
| MAX6721AUTRYD1+T | Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX6721AUTRHD4+T | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6721AUTRHD5+T | 功能描述:監(jiān)控電路 Dual uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6721AUTRHD6+T | 功能描述:監(jiān)控電路 Dual uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6721AUTRVD1+T | 功能描述:監(jiān)控電路 Dual uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX6721AUTRVD2+T | 功能描述:監(jiān)控電路 Dual uPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。