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參數(shù)資料
| 型號： | MAX5963UTL+T |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 291K |
| 描述： | IC HOT SWAP DIO ORING CTL 40TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | FireWire? 應(yīng)用程序 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | 7.5 V ~ 76 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 包裝： | 帶卷 (TR) |
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
______________________________________________________________________________________ 13
Detailed Description
The MAX5963 dual-channel, hot-swap controller IC per-
forms hot-swapping, power-supply ORing, and current
limiting for high availability systems. The MAX5963 incor-
porates six MOSFET drivers (GATEPS, GATEOR,
GATE1_, and GATE2_) to control external n-channel
power MOSFETs to perform low-voltage-drop power-sup-
ply ORing (GATEOR), hot-swapping, and current limiting
from the input power supply to the load. A sense resistor
provides accurate current limiting for each independent
channel. GATE1_ and GATE2_ provide load disconnect
to prevent current flow from PS to OUT_. GATEOR and
GATEPS provide true load disconnect from PS to PWR.
The MAX5963 independent channels remain in low-
current PWR shutdown mode when ENZ is low or when
both ENX and ENY are low. Low-current shutdown
mode disables the MAX5963 channels resulting in less
than 10礎(chǔ) drawn from PWR. However, if the logic com-
bination of ENX, ENY, and ENZ is low, the chip can still
be powered through either channel.
When the input supply voltage (V
PS
) is above the 6.5V
(typ) PS_UVLO threshold, and V
ON_
is above the 1.24V
(typ) V
ONTH
threshold, the MAX5963 channel turns on,
sourcing 50礎(chǔ) (typ) current from GATE_, to enhance Q_
slowly. If the voltage across the current-sense resistor,
V
SENSE_
, is greater than the current-limit threshold, the
MAX5963 regulates the GATE_ voltage to limit the load
current at the current-limit level so that V
SENSE_
is equal
to the current-limit threshold voltage, V
CL
. In normal
operation, V
SENSE_
drops below V
CL
and GATE_ rises to
approximately 5.5V (typ) above OUT_.
If the channel continues to operate in current limit
beyond the current-limit timeout (t
CL
), the MAX5963
either latches off the channel or retries depending on
the state of RETRY. If the voltage across the current-
sense resistor, V
SENSE_
, is greater than the circuit-
breaker threshold for longer than the circuit-breaker
timeout (t
CB
), the MAX5963 either latches off the chan-
nel or retries depending on the state of RETRY. See the
Current-Limit Timeout and Circuit-Breaker Timeout sec-
tions for more information on setting TCL and TCB.
GATEOR controls the MAX5963 ORing function.
Initially, GATEOR is off and the load current conducts
through the body diode of QOR. GATEOR rises to 5.5V
above V
PWR
when (V
SENSEA
+ V
SENSEB
)/2 exceeds
V
OR_TH
, thereby enhancing QOR and reducing the
voltage drop, power dissipation, and heat generation in
the power-supply pathway. When a voltage greater
than V
PWR
is connected at OUTA or OUTB the higher
voltage source provides current to the load(s). The
MAX5963 turns off GATEOR rapidly upon V
SENSE_
falling below the V
OR
hysteresis, thus blocking the
higher voltage from backdriving V
PWR
. When the load
current drops, causing V
SENSE_
to fall below the hys-
teresis, GATEOR turns off.
Current Limiting
The MAX5963 limits the load current by monitoring the
voltage across R
SENSE_
and regulating the current to the
load, ensuring that the voltage across the resistor is
below the programmable current-limit threshold voltage
(V
CL
). Set the maximum current limit (I
CL_LIMIT
) by plac-
ing the appropriate sense resistor between PS and
SENSE_ and the appropriate current-limit threshold set
resistor (R
CL
) between CL and PS. When the load cur-
rent is less than the maximum current limit, GATE_ rises
to 5.5V (typ) above V
OUT_
to fully enhance MOSFET Q1_
and Q2_. See the Current-Limit Threshold section for
more information on setting the current-limit threshold.
When the load attempts to draw more current than
I
CL_LIMIT
, the MAX5963s GATE_ pulldown current
(I
GD_
) regulates the current through Q1_ and Q2_,
causing OUT_ to act as a constant current source. The
output current is limited to I
CL_LIMIT
. If the current-limit
condition persists after the adjustable current-limit
timeout period (t
CL
) has expired, the GATE_ fast pull-
down current (I
GDF_
) quickly turns off GATE_ to dis-
connect the load from the power supply. FAULT_
asserts low under these conditions (Figure 1).
CURRENT-SENSING
THRESHOLDS
V
CL
TIMEOUT
HARD CURRENT LIMIT
V
CB
t
CL
t
CB
CURRENT
MONITORING
t
CL
AND t
CB
RANGE: 1ms TO 30ms
t
CL
COUNTER IS INTEGRATED WITH 1/128 COUNT DOWN RATE
t
CB
COUNTER IS INTEGRATED WITH 1/1 COUNT DOWN RATE
t
CB
DEFAULT IS 3ms
tCL DEFAULT IS 1ms
Figure 1. Bilevel Current-Limit/Circuit-Breaker Functionality
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