參數(shù)資料
型號： MAX5948BESA+T
廠商： Maxim Integrated
文件頁數(shù)： 10/18頁
文件大小： 182K
描述： IC CNTRLR HOT SWAP 8-SOIC
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
類型： 熱交換控制器
應(yīng)用： 通用
內(nèi)部開關(guān)： 無
電源電壓： -20 V ~ -80 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 帶卷 (TR)
-48V Hot-Swap Controllers
with External R
SENSE
10   ______________________________________________________________________________________
If more than 3祍 (typ) deglitch time (t
PHLSENSE
) is
needed to prevent spurious shutdown due to load cur-
rent spikes or noise, a simple lowpass filter can be
used between the SENSE and V
EE
pins as shown in
Figure 9. Resistor R7 and capacitor C3 slow down the
response of the circuit breaker to filter momentary
glitches in the SENSE voltage. The additional delay
time can be estimated with the following equation:
where I
f
is the current in fault condition, I
I
is the initial
current before the fault, and I
CB
is the circuit-breaker
trip current (I
CB
= V
CB
/R1). Alternatively, the corre-
sponding voltages across the sense resistor (V
f
, V
I
, and
V
CB
) may be used in the equation as shown. The
SENSE pin of the MAX5948A/MAX5948B sources very
little current (0.02礎(chǔ) typ), so the addition of resistor R7
will introduce very little error in the circuit-breaker trip
voltage. For example, a 10k& resistor for R7 will only
cause a 200礦 offset.
Example: A system has a 1A nominal load current and
a 20m& sense resistor. The circuit-breaker delay needs
to be increased to 50祍 in response to a load current
step to 5A. The circuit-breaker trip current is
50mV/20m& = 2.5A. Solving for R7 x C3 in the equation
above yields a desired time constant of 100祍. This can
be achieved with R7 = 100& and C3 = 1礔.
t
R   C   In
V   V
V   V
R   C   In
I   I
I   I
cbdly
f
I
f
CB
f    I
f    CB
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