and overvoltage interrupts: VEE
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MAX5945
The MAX5945 also features three other undervoltage
and overvoltage interrupts: VEE undervoltage interrupt
(VEEUV), VDD undervoltage interrupt (VDDUV), and VDD
overvoltage interrupt (VDDOV). A fault latches into the
supply events register (Table 11) but the MAX5945 does
not shut down the ports with a VEEUV, VDDUV, or VDDOV.
DC Disconnect Monitoring
Setting R13h[DCD_EN_] bits high enable DC load mon-
itoring during a normal powered state. If SENSE_ falls
below the DC load disconnect threshold, VDCTH, for
more than tDISC, the device turns off power and asserts
the LD_DISC_ bit of the corresponding port. tDISC is
programmable using R16h[0-1] and R27h[0-3].
AC Disconnect Monitoring
The MAX5945 features AC load disconnect monitoring.
Connect an external sine wave to OSC_IN. The oscilla-
tor requirements are:
Frequency x VP-P = 200VP-P x Hz 卤15%
Positive peak voltage > +2V
Frequency > 60Hz
A 100Hz 卤10%, 2VP-P 卤5%, with +1.2V offset
(VPEAK = +2.2V, typ) is recommended.
The MAX5945 buffers and amplifies 3x the external
oscillator signal and sends the signal to DET_, where
the sine wave is AC coupled to the output. The
MAX5945 senses the presence of the load by monitor-
ing the amplitude of the AC current returned to DET_
(see the Functional Diagram).
Setting R13h[ACD_EN_] bits high enable AC load dis-
connect monitoring during the normal powered state. If
the AC current peak at the DET_ pin falls below IACTH
for more than tDISC, the device turns off power and
asserts the LD_DISC_ bit of the corresponding port.
IACTH is programmable using R23h[0-3].
An internal comparator checks for a proper amplitude
of the oscillator input. If the positive peak of the input
sinusoid falls below a safety value of 2V, OSC_FAIL
sets and the port shuts down. Power cannot be applied
to the ports when ACD_EN is set high and OSC_FAIL is
set high. Leave OSC_IN unconnected or connect it to
DGND when not using AC disconnect detection.
When using the AC disconnect detection feature, con-
nect AGND directly to DNGD as close as possible to
the IC. The MAX5945 also requires a VDD of greater
than +3V for this function. See the Typical Application
Circuit with AC disconnect for other external compo-
nent requirements.
Thermal Shutdown
If the MAX5945 die temperature reaches +150掳C, an
overtemperature fault generates and the MAX5945
shuts down and the MOSFETs turn off. The die temper-
ature of the MAX5945 must cool down below +130掳C to
remove the overtemperature fault condition. After a
thermal shutdown, the part is reset.
Address Inputs
A3, A2, A1, and A0 represent the four LSBs of the chip
address, the complete 7-bit chip address (see Table 3).
The four LSBs latch on the low-to-high transition of
RESET or after a power-supply start (either on VDD or
VEE). Address inputs default high through an internal
50k pullup resistor to VDD. The MAX5945 also
responds to the call through a global address 60h (see
the Global Addressing and Alert Response Protocol
section).
I2C-Compatible Serial Interface
The MAX5945 operates as a slave that sends and
receives data through an I2C-compatible, 2-wire or 3-
wire interface. The interface uses a serial data input line
(SDAIN), a serial data output line (SDAOUT), and a ser-
ial clock line (SCL) to achieve bidirectional communica-
tion between master(s) and slave(s). A master (typically
a microcontroller) initiates all data transfers to and from
the MAX5945, and generates the SCL clock that syn-
chronizes the data transfer. In most applications, con-
nect the SDAIN and the SDAOUT lines together to form
the serial data line (SDA).
Using the separate input and output data lines allows
optocoupling with the controller bus when an isolated
supply powers the microcontroller.
The MAX5945 SDAIN line operates as an input. The
MAX5945 SDAOUT operates as an open-drain output.
A pullup resistor, typically 4.7k, is required on
SDAOUT. The MAX5945 SCL line operates only as an
input. A pullup resistor, typically 4.7k, is required on
SCL if there are multiple masters, or if the master in a
single-master system has an open-drain SCL output.
Serial Addressing
Each transmission consists of a START condition (Figure
7) sent by a master, followed by the MAX5945 7-bit slave
address plus R/W bit, a register address byte, one or
more data bytes, and finally a STOP condition.
Quad Network Power Controller
for Power-Over-LAN
18
______________________________________________________________________________________
010
A3
A2
A1
A0
R/W
Table 3. MAX5945 Address
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