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參數(shù)資料
| 型號： | MAX5942ACSE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC IEEE 802.3AF POE SYSTM 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 控制器類型： | 以太網(wǎng)供電控制器（POE） |
| 接口： | IEEE 802.3af |
| 電源電壓： | 48V |
| 電流 - 電源： | 1mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
10
______________________________________________________________________________________
MAX5942A/MAX5942B
Pin Description
PIN
NAME
FUNCTION
1V+
High-Voltage Startup Input. Referenced to V-. Connect directly to an input voltage range between 18V to 67V.
Connects internally to a high-voltage linear regulator that generates VCC during startup.
2VDD
Line Regulator Input. Referenced to V-. VDD is the input to the linear regulator that generates VCC. For
supply voltages less than 36V, connect VDD and V+ to the supply. For supply voltages greater than 36V,
VDD receives its power from the tertiary winding of the transformer and accepts voltages from 13V to 36V.
Bypass VDD to V- with a 4.7F capacitor.
3FB
Fixed-Gain Inverting Amplifier Input. Referenced to V-. Connect a voltage-divider from the regulated output
to FB. The noninverting input of the amplifier is referenced to +2.4V
4
SS_SHDN
Soft-Start Timing Capacitor Connection. Referenced to V-. Ramp time to full current limit is approximately
0.45ms/nF. Bypass with a minimum 10nF capacitor to V-. A 2.4V reference voltage appears across the
capacitor. Disable the PWM controller by pulling SS_SHDN below 0.25V.
5
UVLO
Undervoltage Lockout Programming Input for Power Mode. Referenced to VEE. When UVLO is above its
threshold, the device enters the power mode. Connect UVLO to VEE to use the default undervoltage lockout
threshold. Connect UVLO to an external resistor-divider to define a threshold externally. The series
resistance value of the external resistors must add to 25.5k (±1%) and replaces the detection resistor. To
keep the device in undervoltage lockout, pull UVLO between VTH,G,UVLO and VREF,UVLO.
6
RCL
Classification Setting. Referenced to VEE. Add a resistor from RCL to VEE to set a PD class (see Table 1).
7
GATE
Gate of Internal N-Channel Power MOSFET. Referenced to VEE . GATE sources 10A when the device
enters the power mode. Connect an external 100V ceramic capacitor from GATE to VOUT to program the
inrush current. Pull GATE to VEE to turn off the internal MOSFET. The detection and classification functions
operate normally when GATE is pulled to VEE.
8VEE
Negative Input Power. Source of the integrated isolation N-channel power MOSFET. Connect VEE to
-48V.
9
OUT
Output Voltage. Referenced to VEE. Drain of the integrated isolation N-channel power MOSFET. Connect
OUT to V-.
10
PGOOD
Power-Good Indicator Output, Active High, Open Drain. PGOOD is referenced to OUT. PGOOD goes high
impedance when VOUT is within 1.2V of VEE and when GATE is 5V above VEE. Otherwise, PGOOD is pulled
to OUT (given that VOUT is at least 5V below GND).
11
PGOOD
Power-Good Indicator Output, Active Low, Open Drain. PGOOD is referenced to VEE. PGOOD is pulled to
VEE when VOUT is within 1.2V of VEE and when GATE is 5V above VEE. Otherwise, PGOOD goes high
impedance.
12
GND
Ground. Referenced to VEE. GND is the positive input power.
13
CS
Current-Sense Input. Referenced to V-. Turns power switch off if VCS rises above 465mV for cycle-by-cycle
current limiting. CS is also the feedback for the current-mode controller. CS connects to the PWM controller
through a leading-edge blanking circuit.
14
V-
Ground. V- is the ground terminal of the PWM controller.
15
NDRV
Gate Drive. Referenced to V-. Drives a high-voltage external N-channel power MOSFET.
16
VCC
Regulated IC Supply. Referenced to V-. Provides power for MAX5942_. VCC is regulated from VDD during
normal operation and from V+ during startup. Bypass VCC with a 10F tantalum capacitor in parallel with a
0.1F ceramic capacitor to V-.
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| MAX5942AESE | 功能描述:電源開關(guān) IC - POE / LAN RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時間（最大值）:13 ns 關(guān)閉時間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6 |
| MAX5942AESE+ | 功能描述:輸入/輸出控制器接口集成電路 IEEE 802.3af POE Int/PWM Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| MAX5942AESE+T | 功能描述:輸入/輸出控制器接口集成電路 IEEE 802.3af POE Int/PWM Controller RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| MAX5942AESE-T | 功能描述:電源開關(guān) IC - POE / LAN RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時間（最大值）:13 ns 關(guān)閉時間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6 |
| MAX5942BCSE | 功能描述:電源開關(guān) IC - POE / LAN RoHS:否 制造商:Fairchild Semiconductor 開關(guān)數(shù)量:Single 開關(guān)配置:SPST 開啟電阻（最大值）:7.3 Ohms 串話: 帶寬: 開啟時間（最大值）:13 ns 關(guān)閉時間（最大值）:20 ns 切換電壓（最大）: 工作電源電壓:8 V to 26 V 最大工作溫度:+ 125 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220F-6 |
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