參數(shù)資料
型號: MAX5930AEEG+
廠商: Maxim Integrated
文件頁數(shù): 13/23頁
文件大小: 331K
描述: IC HOT SWAP CTLR PWR SEQ 24QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開關(guān):
電源電壓: 1 V ~ 15 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 24-QSOP
包裝: 管件
The MAX5930A/MAX5931A/MAX5931B limit the load
current if an overcurrent fault occurs during startup
instead of completely turning off the external MOSFETs.
The slow comparator is disabled during the startup
period and the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external current-
sense resistor.
During the startup period, the gate-drive current is limit-
ed to 100礎(chǔ) and decreases with the increase of the gate
voltage (see the Typical Operating Characteristics sec-
tion). This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcurrent,
the MAX5930A/MAX5931A/MAX5931B regulate the gate
voltage to ensure that the voltage across the sense resis-
tor does not exceed V
SU,TH
. This effectively regulates
the inrush current during startup.
Figure 6 shows the startup waveforms. STAT_ is assert-
ed immediately after the startup period if no fault condi-
tion is present.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a strong 3mA/50mA pulldown
current in response to a fault condition. After a fault,
STAT_ is deasserted. Use the LATCH input to control
whether the STAT_ outputs latch off or autoretry (see
the Latched and Autoretry Fault Management section).
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Slow-Comparator Normal Operation
After the startup period is complete, the slow comparator
is enabled and the device enters normal operation. The
comparator threshold voltage (V
SC,TH
) is adjustable from
25mV to 100mV. The slow-comparator response time is
3ms for a 1mV overdrive. The response time decreases
to 100祍 with a large overdrive. The variable-speed
response time allows the MAX5930A/MAX5931A/
MAX5931B to ignore low-amplitude momentary glitches,
thus increasing system noise immunity. After an extend-
ed overcurrent condition, a fault is generated, STAT_ out-
puts are deasserted and the MOSFET gates are
discharged with a 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period, the fast comparator regu-
lates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup
fast-comparator threshold voltage (V
SU,TH
), V
SU,TH
is
scaled to two times the slow-comparator threshold
(V
SC,TH
).
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________   13
Figure 4. Power-Sequencing Fault Turn-Off
ON1 = ON2 = ON3
OVERCURRENT
FAULT
CONDITION
OUT1
OUT2
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY 
  OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
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