參數(shù)資料
型號(hào): MAX5916EUI+
廠商: Maxim Integrated
文件頁(yè)數(shù): 4/25頁(yè)
文件大?。?/td> 488K
描述: IC HOT-SWAP CTRLR DUAL 28-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類(lèi)型: 熱交換控制器
應(yīng)用: PCI 2.2 服務(wù)器
內(nèi)部開(kāi)關(guān): 無(wú)
電源電壓: 10.8 V ~ 13.2 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 管件
Dual PCI 2.2 Hot-Swap Controllers
4  _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
-12VIN
= -12V, V
+12VIN
= +12V, V
3.3VAUXIN
= +3.3V, V
ON_
= V
AUXON_
= +5V, T
A
= T
MIN
to T
MAX
, unless otherwise specified.
Typical values are at T
A
= +25癈.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
T
A
 = +25癈, I
D
 = 0.4A
0.24
0.4
On-Resistance of Internal Switch   R
DS ON 3.3VAUX
T
A
 = +85癈, I
D
 = 0.4A
0.6
&
Foldback Current Limit
I
3.3VAUXIN LIM
V
3.3VAUXO
_ = 0V
0.5
0.75
1.0
A
Current-Foldback Threshold
Output current rising (Note 2)
1.2
A
Output Undervoltage Threshold
V
3.3VAUXIN UV
2.76
2.89
2.99
V
Auxiliary Input UVLO Delay Time
t
DEG, UVLO
(Note 1)
1.6
ms
3.3VAUXO_ Internal Pulldown
R
3.3VAUXO_
ON_ = 0V
1
k&
ON AND AUXON COMPARATORS
Threshold Voltage
1.0
2.1
V
Hysteresis
V
HYS
25
mV
Input Bias Current
I
B, COMP
20
礎(chǔ)
ON_ and AUXON_ Deglitch
Time
t
DEG
Figures 58 (Note 3)
4
FAULT RESPONSE, PGOOD_ STATUS OUTPUT COMPARATORS
t
RESP
Figures 58    MAX5915/MAX5916
0.5
1.5
ms
PGOOD_ Output Overcurrent
and Undervoltage Response
Time
t
RESP2
Figures 58    MAX5915A/MAX5916A
100
ns
Output Overcurrent and
Undervoltage Deglitch Time
t
DELAY
Figures 37
16 x
t
RESP
ms
PGOOD_ Startup Timeout
t
START
See Figures 1, 2, 5, 6, 7, and 8
4 x
t
DELAY
ms
Autorestart Delay
t
RESTART
Delay time to restart after OC and/or
UV shutdown
64 x
t
START
ms
PGOOD_ Output Low Voltage
V
OL
I
SINK
= 2mA, ON_ = 0V
0.5
0.7
V
PGOOD_ Output High Leakage
Current
I
LEAK
V
PGOOD_
 = +5.5V
1
礎(chǔ)
Thermal Shutdown Threshold
T
SD
(Note 4)
125
Thermal Shutdown Hysteresis
T
HYS
5
Full Thermal Shutdown
Threshold
T
SD, FULL
(Note 5)
T
SD
 +
20
Full Thermal Shutdown
Hysteresis
T
HYS, FULL
5
Note 1: t
DEG, UVLO
is negative edge triggered. There is no time delay when the inputs rise above the UVLO threshold.
Note 2: The current threshold when the output current starts to fold back. See the Typical Operating Characteristics.
Note 3: t
DEG
is negative edge triggered. ON_ or AUXON_ transition from low to high has no delay.
Note 4: Temperature threshold at which the outputs of the channel with overcurrent shut down.
Note 5: The temperature threshold at which both channels shut down.
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