參數(shù)資料
型號(hào): MAX5858AECM+D
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 17/25頁(yè)
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL 300MSPS 48TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 250
設(shè)置時(shí)間: 11ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 816mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 48-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 48-TQFP 裸露焊盤(pán)(7x7)
包裝: 托盤(pán)
輸出數(shù)目和類(lèi)型: 2 電流,單極
采樣率(每秒): 300M
MAX5858A
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x
Interpolation Filters and PLL
24
______________________________________________________________________________________
Gain Error
A gain error is the difference between the ideal and the
actual full-scale output current on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step. The ideal current is
defined by reference voltage at VREFO / IREF x 32.
Settling Time
The settling time is the amount of time required from the
start of a transition until the DAC output settles to its
new output value to within the converter’s specified
accuracy.
Glitch Impulse
A glitch is generated when a DAC switches between
two codes. The largest glitch is usually generated
around the midscale transition, when the input pattern
transitions from 011…111 to 100…000. This occurs due
to timing variations between the bits. The glitch impulse
is found by integrating the voltage of the glitch at the
midscale transition over time. The glitch impulse is usu-
ally specified in pV-s.
Chip Information
TRANSISTOR COUNT: 178,376
PROCESS: CMOS
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