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參數(shù)資料
| 型號(hào)： | MAX5812NEUT+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC SERIAL 12BIT 1CH SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 設(shè)置時(shí)間： | 4µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 727mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-6 |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
MAX5812
12-Bit Low-Power, 2-Wire, Serial
Voltage-Output DAC
10
______________________________________________________________________________________
Table 3. Command Byte Definitions
SERIAL DATA INPUT
C3
C2
C1
C0
D11/PD1*
D10/PD0*
D9–D8
FUNCTION
11
00
DAC
DATA
DAC
DATA
DAC
DATA
Load DAC with a new data from the following data byte
and update DAC output simultaneously as soon as data
is available from the serial bus. The DAC and input
registers are updated with the new data.
11
01
DAC
DATA
DAC
DATA
DAC
DATA
Load input register with the data from the following data
byte. DAC output remains unchanged.
11
10
DAC
DATA
DAC
DATA
DAC
DATA
Load input register with data from the following data byte.
Update DAC output to the previously stored data.
11
X
XX
Update DAC output from input register. The device will
ignore any new data.
10X
X
XX
Read data request. Data bits are ignored. The contents of
the DAC register are available on the bus.
0
1
X
0
XX
Powers up device.
01X
X
0
1
XX
Power-down mode 0. Powers down device with output
floating.
01X
X
1
0
XX
Power-down mode 1. Powers down device with output
terminated with 1k
to GND.
01X
X
1
XX
Power-down mode 2. Powers down device with output
terminated with 100k
to GND.
S
MSB
A6
A5
A4
A3
A2
A1
A0
C3
C2
C1
C0
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
P
R/W
ACK
LSB
MSB
LSB
S
MSB
A6
A5
A4
A3
A2
A1
A0
C3
C2
X
PD1
PD0
X
P
R/W
ACK
LSB
EXAMPLE WRITE DATA SEQUENCE
EXAMPLE WRITE TO POWER-DOWN REGISTER SEQUENCE
MSB
LSB
Figure 6. Example Write Command Sequences
*When C3 = 0 and C2 = 1, data bits D11 and D10 write to the power-down registers (PD1 and PD0).
X = Don’t care.
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