參數(shù)資料
型號： MAX5753UTN+
廠商： Maxim Integrated Products
文件頁數(shù)： 8/25頁
文件大?。?/td> 0K
描述： IC DAC 14BIT 32CHAN SER 56-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 37
設(shè)置時間： 20µs
位數(shù)： 14
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 32
電壓電源： 模擬和數(shù)字
工作溫度： 0°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 56-TQFN-EP（8x8）
包裝： 管件
輸出數(shù)目和類型： 32 電壓，單極
采樣率（每秒）： *
MAX5753/MAX5754/MAX5755
32-Channel, 14-Bit, Voltage-Output
DACs with Serial Interface
16
______________________________________________________________________________________
C2, C1, and C0 = 010, address bits A5–A0 = 111111,
and all data bits to don’t care. See Table 3 for the data
format. This operation updates all DAC outputs.
Note: The software load DAC does not affect the offset DAC.
Clear (
CLR)
The MAX5753/MAX5754/MAX5755 feature an active-low
CLR logic input that sets all channels including the offset
DAC to 0V (code 0000 hex). The offset DAC needs to be
reprogrammed after CLR is asserted. Driving CLR low
clears the contents of both the input and DAC registers.
The serial interface can also issue a software clear com-
mand. Setting the control bits C2, C1, and C0 = 111
(Table 4) performs the same function as driving logic-
input CLR low. Table 4 shows the clear-data format for
the software-controlled clear command. This register-
reset process cannot be interrupted. All serial input data
is ignored until the entire reset process is complete.
Serial Interface
A 3-wire SPI-/QSPI-/MICROWIRE-/DSP-compatible serial
interface controls the MAX5753/MAX5754/MAX5755.
The interface requires a 32-bit command word to control
the device. The command word consists of 3 control
bits, 6 address bits, 7 don’t-care bits, 14 data bits, and
S1 and S0 (don’t-care bits). Table 5 shows the general
serial-data format. The control bits control various write
and read commands as well as the load DAC and clear
commands. Table 6 shows the control-bit functions. The
address bits select the register(s) to be written. Table 7
shows the address functions. The data bits control the
value of the DAC outputs.
Table 3. Load-DAC Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS*
C2, C1,
AND C0
A5–A0
—
D13–D0,
S1 AND S0
010
111111
XXXXXXX
XXXXXXXXXXXXXXXX
Table 4. Clear-Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS*
C2, C1,
AND C0
A5–A0
—
D13–D0,
S1 AND S0
111
See table
XXXXXXX
XXXXXXXXXXXXXXXX
Table 5. Serial-Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS*
MSB
LSB
C2, C1,
and C0
A5–A0
XXXXXXX
D13–D0, S1 and S0
Table 6. Control-Bit Functions
CONTROL
BITS
C2 C1 C0
CONTROL-BIT DESCRIPTION
00
0
No operation (NOP); no internal registers
change state. The NOP command can be
passed to DOUT depending on the state of the
configuration register. Address bits A5–A0 and
data bits D13–D0 are ignored.
00
1
Loads D13–D0 into the input register(s) for the
selected address. Depending on the address
bits, this command could write to:
The configuration register (A[5:0] = 100001)
One of the input registers of the 32 DAC channels
All 32 DAC input registers (A[5:0] = 111111)
The offset DAC input register (A[5:0] = 100000)
01
0
Loads DAC register(s) from the input register(s).
Depending on the address bits, this command
can update one or all of the DAC registers from
the stored input register value(s). Data bits
D13–D0 are ignored.
01
1
Write-through; loads D13–D0 into the input and
DAC registers, depending on the address bits.
10
0
Read command; depending on the address bits,
one of the DAC-register values or the
configuration-register value may be read back
through DOUT. Data bits D13–D0 are ignored.
1
0
1
Reserved for internal testing; do not use.
1
0
Reserved for internal testing; do not use.
11
1
Clear register(s); depending on the address bits,
one or all registers (except the offset-DAC registers)
are cleared to zero. Data bits D13–D0 are ignored.
*S1 and S0 are empty bits—set to zero.
相關(guān)PDF資料
PDF描述
VI-J6K-MY-S CONVERTER MOD DC/DC 40V 50W
VI-B3L-MX-F4 CONVERTER MOD DC/DC 28V 75W
VI-B3L-MX-F3 CONVERTER MOD DC/DC 28V 75W
VI-J6J-MY-S CONVERTER MOD DC/DC 36V 50W
VI-B3L-MX-F2 CONVERTER MOD DC/DC 28V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MAX5753UTN+ 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5753UTN+T 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5753UTN-T 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5754ETN 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
MAX5754UCB 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*