- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10816 > MAX5735AUTN+ (Maxim Integrated Products)IC DAC 16BIT 32CHAN SER 56-TQFN PDF資料下載
參數(shù)資料
| 型號(hào)： | MAX5735AUTN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 10/28頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 32CHAN SER 56-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 設(shè)置時(shí)間： | 20µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 32 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 2.5W |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 56-TQFN-EP（8x8） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 32 電壓，雙極 |
| 采樣率（每秒）： | * |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)
MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
18
______________________________________________________________________________________
C2, C1, and C0 = 010, address bits A5–A0 = 111111,
and all data bits to don’t care. See Table 3 for the data
format. This operation updates all DAC outputs.
Note: The software load DAC does not affect the offset DAC.
Clear (
CLR)
The MAX5732–MAX5735 feature an active-low
CLR
logic input that sets all channels including the offset
DAC to 0V (code 0000hex). The offset DAC needs to be
reprogrammed after
CLR is asserted. Driving CLR low
clears the contents of both the input and DAC registers.
The serial interface can also issue a software clear com-
mand. Setting the control bits C2, C1, and C0 = 111
(Table 4) performs the same function as driving logic-
input
CLR low. Table 4 shows the clear-data format for
the software-controlled clear command. This register-
reset process cannot be interrupted. All serial input data
is ignored until the entire reset process is complete.
Serial Interface
A 3-wire SPI-/QSPI-/MICROWIRE- and DSP-compatible
serial interface controls the MAX5732–MAX5735. The
interface requires a 32-bit command word to control the
device. The command word consists of 3 control bits, 6
address bits, 7 don’t-care bits, and 16 data bits. Table 5
shows the general serial-data format. The control bits
control various write and read commands as well as the
load DAC and clear commands. Table 6 shows the con-
trol-bit functions. The address bits select the register(s)
to be written. Table 7 shows the address functions. The
data bits control the value of the DAC outputs.
Table 3. Load-DAC Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS
C2, C1,
AND C0
A5–A0
—
D15–D0
010
111111
XXXXXXX
XXXXXXXXXXXXXXXX
Table 4. Clear-Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS
C2, C1,
AND C0
A5–A0
—
D15–D0
111
See table 7
XXXXXXX
XXXXXXXXXXXXXXXX
Table 5. Serial-Data Format
CONTROL
BITS
ADDRESS
BITS
DON’T-
CARE
BITS
DATA BITS
MSB
LSB
C2, C1,
and C0
A5–A0
XXXXXXX
D15–D0
Table 6. Control-Bit Functions
CONTROL
BITS
C2 C1 C0
CONTROL-BIT DESCRIPTION
00
0
No operation (NOP); no internal registers
change state. The NOP command can be
passed to DOUT depending on the state of the
configuration register. Address bits A5–A0 and
data bits D15–D0 are ignored.
00
1
Loads D15–D0 into the input register(s) for the
selected address. Depending on the address
bits, this command could write to:
The configuration register (A[5:0] = 100001)
One of the input registers of the 32 DAC channels
All 32 DAC input registers (A[5:0] = 111111)
The offset DAC input register (A[5:0] = 100000)
01
0
Loads DAC register(s) from the input register(s).
Depending on the address bits, this command
can update one or all of the DAC registers from
the stored input register value(s). Data bits
D15–D0 are ignored.
01
1
Write-through; loads D15–D0 into the input and
DAC registers, depending on the address bits.
10
0
Read command; depending on the address bits,
one of the DAC-register values or the
configuration-register value may be read back
through DOUT. Data bits D15–D0 are ignored.
1
0
1
Reserved for internal testing; do not use.
1
0
Reserved for internal testing; do not use.
11
1
Clear register(s); depending on the address bits,
one or all registers (except the offset-DAC registers)
are cleared to zero. Data bits D15–D0 are ignored.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX5734AUTN+ | IC DAC 16BIT 32CHAN SER 56-TQFN |
| SP3220EBCY-L | IC DVR/RCVR RS232 ESD 16TSSOP |
| MAX5733AUTN+ | IC DAC 16BIT 32CHAN SER 56-TQFN |
| SP3243EEA-L | IC TXRX RS232 INTELLIGENT 28SSOP |
| MAX5735BUTN+T | IC DAC 16BIT 32CHAN SER 56-TQFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5735AUTN+ | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5735AUTN+T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 10-Bit 32Ch Precision DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5735AUTN-T | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5735BCTN | 制造商:Maxim Integrated Products 功能描述:16-BIT 32 CHANNEL -5V - +5V VOUT DAC - Rail/Tube |
| MAX5735BCTN-T | 制造商:Maxim Integrated Products 功能描述:16-BIT 32 CHANNEL -5V - +5V VOUT DAC - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。