參數(shù)資料
型號(hào)： MAX5734AUTN+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 5/28頁(yè)
文件大小： 0K
描述： IC DAC 16BIT 32CHAN SER 56-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 37
設(shè)置時(shí)間： 20µs
位數(shù)： 16
數(shù)據(jù)接口： MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 32
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 2.5W
工作溫度： 0°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 56-TQFN-EP（8x8）
包裝： 管件
輸出數(shù)目和類型： 32 電壓，單極
采樣率（每秒）： *
MAX5732–MAX5735
32-Channel, 16-Bit, Voltage-Output
DACs with Serial Interface
______________________________________________________________________________________
13
PIN
TQFN
TQFP
NAME
FUNCTION
1, 42, 48
1, 48, 55
AVCC
Output Amplifier Positive Supply Input. Bypass to VSS with a 0.1F capacitor.
2
OUT9
DAC9 Buffered Analog Output Voltage
3
OUT8
DAC8 Buffered Analog Output Voltage
4
OUT7
DAC7 Buffered Analog Output Voltage
5
5, 15–18, 33,
34, 49, 64
N.C.
No Connection. Internally connected. Do not make any connections to N.C.
6
OUT6
DAC6 Buffered Analog Output Voltage
7
OUT5
DAC5 Buffered Analog Output Voltage
8
OUT4
DAC4 Buffered Analog Output Voltage
9, 38
9, 44
AGND
Analog Ground
10
OUT3
DAC3 Buffered Analog Output Voltage
11, 28, 39
11, 32, 45
VSS
Output-Amplifier Negative-Supply Input
12
OUT2
DAC2 Buffered Analog Output Voltage
13
OUT1
DAC1 Buffered Analog Output Voltage
14
OUT0
DAC0 Buffered Analog Output Voltage
15
19
DSP
Digital Serial-Interface Select Input. Drive low for DSP-interface mode. Drive high for SPI-
interface mode.
16
20
CS
Active-Low Digital Chip-Select Input
17
21
DOUT
Digital Serial Data Output. Use DOUT to daisy-chain and read the contents of the DAC registers.
18
22
SCLK
Digital Serial Clock Input Clock
19
23
DIN
Digital Serial Data Input
20
24
DVDD
Digital Power Supply Input. Bypass to DGND with a 0.1F capacitor.
21
25
DGND
Digital Ground
22
26
LDAC
Active-Low Digital-Load DAC Input. Drive this asynchronous input low to transfer the contents of
the input register to their respective DAC registers and set all DAC outputs accordingly.
23
27
CLR
Active-Low Digital-Clear Input. Drive this asynchronous input low to clear the contents of the
input and DAC registers and set all the DAC outputs to zero.
24
28
GS
Ground-Sense Analog Input. Offsets the DAC amplifier outputs by ±0.5V to compensate for
a remote system ground potential difference.
25, 49
29, 56
REFGN
Reference Ground
26
30
REF
Analog Reference Voltage Input
27, 50
31, 57
AVDD
Analog Power Supply Input. Bypass to AGND with a 0.1F capacitor.
29
35
OUT31
DAC31 Buffered Analog Output Voltage
30
36
OUT30
DAC30 Buffered Analog Output Voltage
31
37
OUT29
DAC29 Buffered Analog Output Voltage
32
38
OUT28
DAC28 Buffered Analog Output Voltage
33
39
OUT27
DAC27 Buffered Analog Output Voltage
34
40
OUT26
DAC26 Buffered Analog Output Voltage
35
41
OUT25
DAC25 Buffered Analog Output Voltage
Pin Description
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