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參數(shù)資料
| 型號： | MAX561 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | 3.3V Transceiver with Two EIA TIA 562 Receivers Active in Shutdown |
| 中文描述： | 3.3V收發(fā)器、兩個EIA TIA 562接收器，關(guān)斷后保持有效 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 667K |
| 代理商： | MAX561 |
sequencer resumes normal operation at the interrupted
channel 7.
Burst Mode
Burst Mode allows multiple SRAM locations to be
loaded at high speed. During Burst Mode, the output
voltages are not updated until the data burst is com-
plete and control returns to the sequencer. Select Burst
Mode by driving both IMMED and C1 low.
The sequencer is interrupted when
CS
is taken low. All
or part of the memory can be loaded while
CS
is low.
Each data word is loaded into its specified SRAM
address. The DAC conversion and SHA sample in
progress are completely transparent to the serial bus
activity. When
CS
is taken high, the sequencer resumes
scrolling at the interrupted SRAM address. New values
are updated when their turn comes up in the sequence.
After Burst Mode is used, it is recommended that at
least one full sequencer loop (320μs) is allowed to
occur before the serial port is accessed again. This
ensures that all outputs are updated before the
sequencer is interrupted.
Figure 6 shows an example of a burst mode operation.
As with the immediate update example,
CS
falls while
channel 7 is being refreshed. Data for multiple chan-
nels is loaded, and no channels are refreshed as long
as
CS
remains low. Once
CS
returns high, sequencing
resumes with channel 7 and continues normal refresh
operation. Thirty-three f
SEQ
cycles are required before
all channels have been updated.
External Sequencer Clock
An external clock may be used to control the
sequencer, altering the output update rate. The
sequencer runs at 1/4 the frequency of the supplied
clock (ECLK). The external clock option is selected by
driving either C0 or CLKSEL high.
When CLKSEL is asserted, the internal clock oscillator
is disabled. This feature allows synchronizing the
sequencer to other system operations, or shutting down
of the sequencer altogether during high-accuracy sys-
tem measurements. The low 1mV/s droop of these
devices ensures that no appreciable degradation of the
output voltages occurs, even during extended periods
of time when the sequencer is disabled.
Power-On Reset
A power-on reset (POR) circuit sets all channels to 0V
(code 4F2C hex) in sequence, requiring 320μs. This
prevents damage to downstream ICs due to arbitrary
reference levels being presented following system
power-up. This same function is available by driving
RST
low. During the reset operation, the sequencer is
run by the internal clock, regardless of the state of
CLKSEL. The reset process cannot be interrupted, seri-
al inputs will be ignored until the entire reset process is
complete.
Applications Information
Power Supplies and Bypassing
Grounding and power-supply decoupling strongly influ-
ence device performance. Digital signals may couple
through the reference input, power supplies, and
ground connection. Proper grounding and layout can
reduce digital feedthrough and crosstalk. At the device
level, a 0.1μF capacitor is required for the V
DD
, V
SS
,
and V
L_
pins. They should be placed as close to the
pins as possible. More substantial decoupling at the
board level is recommended and is dependent on the
number of devices on the board (Figure 7).
The MAX5631/MAX5632/MAX5633 have three separate
+5V logic power supplies, V
LDAC
, V
LOGIC
, and V
LSHA
.
V
LDAC
powers the 16-bit digital-to-analog converter,
V
LSHA
powers the control logic of the SHA array, and
V
LOGIC
powers the serial interface, sequencer, internal
clock and SRAM. Additional filtering of V
LDAC
and
V
LSHA
improves the overall performance of the device.
Chip Information
TRANSISTOR COUNT: 16,229
PROCESS: BiCMOS
M
16-Bit DACs with 32-Channel
Sample-and-Hold Outputs
______________________________________________________________________________________
13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX5622 | 16-Bit DACs with 16-Channel Sample-and-Hold Outputs |
| MAX5623 | 16-Bit DACs with 16-Channel Sample-and-Hold Outputs |
| MAX5633 | 16-Bit DACs with 32-Channel Sample-and-Hold Outputs |
| MAX563CPN | +3.3V-Powered, EIA/TIA-562 Dual Transceiver with Receivers Active in Shutdown |
| MAX563CWN | +3.3V-Powered, EIA/TIA-562 Dual Transceiver with Receivers Active in Shutdown |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5610 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5611 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5612 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5618CUE | 制造商:MAX 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| MAX561C/D | 功能描述:RS-232接口集成電路 3.3V Transceiver with Two EIA TIA 562 Receivers Active in Shutdown RoHS:否 制造商:Exar 數(shù)據(jù)速率:52 Mbps 工作電源電壓:5 V 電源電流:300 mA 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-100 封裝: |
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