參數(shù)資料
型號： MAX555
廠商： Maxim Integrated Products, Inc.
英文描述： 300Msps, 12-Bit DAC with Complementary Voltage Outputs
中文描述： 300Msps、12位DAC，互補(bǔ)電壓輸出
文件頁數(shù)： 1/12頁
文件大?。?/td> 98K
代理商： MAX555
_______________General Desc ription
The MAX555 is an advanced, monolithic, 12-bit digital-
to-analog converter (DAC) with complementary 50
outputs. Fabricated using an oxide-isolated bipolar
process, the MAX555 is designed for signal-reconstruc-
tion applications at an output update rate of 300Msps.
It incorporates an analog multiplying function with
10MHz useable input bandwidth. The voltage-output
DAC uses precision laser trimming to achieve 12-bit
accuracy with ±1/2LSB integral and differential linearity
(±0.012% FS). Absolute gain error is a low 1% of full
scale. Full-scale transitions occur in less than 0.5ns.
Internal registers and a unique decoder reduce glitch-
ing and allow the MAX555 to achieve precise RF perfor-
mance with over 73dBc of spurious-free dynamic range
at 50Msps with f
OUT
= 3.1MHz, or 62dBc at 300Msps
with f
OUT
= 18.6MHz.
The MAX555 operates from a single -5.2V supply and
dissipates 980mW (nominal). It comes in a 68-pin ther-
mally enhanced PLCC package capable of accepting a
heatsink.
________________________Applic ations
Direct Digital Synthesis
Arbitrary Waveform Generation
HDTV/High-Resolution Graphics
Instrumentation
Communications Local Oscillators
Automated Tester Applications
___________________________________________________S implified Bloc k Diagram
____________________________Features
o
12-Bit Resolution
o
±1/2LSB Integral and Differential Nonlinearity
o
Capable of 300Msps Min Update Rate
o
Complementary 50
Outputs
o
Multiplying Reference Input
o
Low Glitch Energy (5.6pVs)
o
Single -5.2V Power Supply
o
On-Chip Data Registers
o
ECL-Compatible Inputs with Differential Clock
______________Ordering Information
M
300Msps, 12-Bit DAC with
Complementary Voltage Outputs
________________________________________________________________ Maxim Integrated Products
Call toll free 1-800-998-8800 for literature.
1
-20mA
LGND
VOUT
VOUT
CLK
CLK
ROFFSET
VREF
50
800
800
50
AV
EE
BYPASS
DECODED
BIT
LINES
12-BIT
ECL
LINES
L
MAX555
19-0297; Rev 1; 9/95
PART
MAX555CQK
0°C to +70°C
TEMP. RANGE
PIN-PACKAGE
68 Thermally
Enhanced PLCC
Pin Configuration appears at end of data sheet.
EVALUATION KIT MANUAL
FOLLOWS DATA SHEET
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