參數(shù)資料
型號(hào): MAX5530ETC+T
廠商: Maxim Integrated Products
文件頁數(shù): 9/19頁
文件大?。?/td> 0K
描述: IC DAC 12BIT SGL ULP 12-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時(shí)間: 660µs
位數(shù): 12
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 1.35mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 12-WQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 12-TQFN-EP(4x4)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
MAX5530/MAX5531
Ultra-Low-Power, 12-Bit,
Voltage-Output DACs
______________________________________________________________________________________
17
R
2N3904
NDAC IS THE NUMERIC VALUE OF THE DAC INPUT CODE.
ILED
REFIN
LED
MAX5530
V+
DAC
VOUT
ILED =
VREFIN × NDAC
4096 × R
FB
Figure 4. Programmable Current Source Driving an LED
DAC
BAND
GAP
TO ADC
OUT
REFOUT
MAX5531
TO ADC
FB
WE
SENSOR
CE
IF
RF
CL
REF
Figure 6. Self-Biased Two-Electrode Potentiostat Application
R
FB
NDAC IS THE NUMERIC VALUE
OF THE DAC INPUT CODE.
IT
REFIN
MAX5530
VOUT
VOUT = VBIAS + (IT × R)
VOUT
VBIAS
TRANSDUCER
VBIAS =
VREFIN × NDAC
4096
DAC
Figure 5. Transimpedance Configuration for a Voltage-Biased
Current-Output Transducer
NA IS THE DAC INPUT CODE
(0 TO 4095 DECIMAL).
REFIN
MAX5530
OUT
FB
VOUT =
VREFIN × NA
4096
DAC
Figure 7. Unipolar Output Circuit
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
1100
+VREF (4095/4096)
1000
0000
0001
+VREF (2049/4096)
1000
0000
+VREF (2048/4096) = +VREF / 2
0111
1111
+VREF (2047/4096)
0000
0001
+VREF (1/4096)
0000
0V
Table 4. Unipolar Code Table (Gain = +1)
DAC CONTENTS
MSB
LSB
ANALOG OUTPUT
1111
+VREF (2047/2048)
1000
0000
0001
+VREF (1/2048)
1000
0000
0V
0111
1111
-VREF (1/2048)
0000
0001
-VREF (2047/2048)
0000
-VREF (2048/2048) = -VREF
Table 5. Bipolar Code Table (Gain = +1)
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