參數(shù)資料
型號: MAX5483EUD+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC POT DGTL 10BIT NV 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
接片: 1024
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 非易失
接口: 4 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.7 V ~ 5.25 V,±2.5 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
10-Bit, Nonvolatile, Linear-Taper Digital
Potentiometers
Pin Description (continued)
PIN
TQFN
TSSOP
NAME
FUNCTION
4–7, 15
7, 8, 9, 13
N.C.
No Connection. Not internally connected.
1
12
D.N.C.
Do Not Connect. Leave unconnected for proper operation.
2
11
W
Wiper Terminal
3
10
L
Low Terminal
8, 16
14
VSS
Negative Power-Supply Input. For single-supply operation, connect VSS to GND. For dual-
supply operation, -2.5V
≤ VSS ≤ -0.2V as long as (VDD - VSS) ≤ 5.25V. Bypass VSS to GND
with a 0.1F ceramic capacitor as close to the device as possible.
9
6
SPI/
UD
Interface-Mode Select. Select serial SPI interface when SPI/
UD = 1. Select serial up/down
interface when SPI/
UD = 0.
Serial SPI Interface Data Input (SPI/
UD = 1)
10
5
DIN(U/
D)
Up/Down Control Input (SPI/
UD = 0). With DIN(U/D) low, a high-to-low SCLK(INC) transition
decrements the wiper position. With DIN(U/
D) high, a high-to-low SCLK(INC) transition
increments the wiper position.
Serial SPI Interface Clock Input (SPI/
UD = 1)
11
4
SCLK(
INC) Wiper Increment Control Input (SPI/UD = 0). With CS low, the wiper position moves in the
direction determined by the state of DIN(U/
D) on a high-to-low transition.
12
3
CS
Active-Low Digital Input Chip Select
13
2
GND
Ground
14
1
VDD
Positive Power-Supply Input (+2.7V
≤ VDD ≤ +5.25V). Bypass VDD to GND with a 0.1F
ceramic capacitor as close to the device as possible.
EP
Exposed Pad (TQFN Only). Externally connect EP to VSS or leave unconnected.
(MAX5483/MAX5484 Variable Resistors)
MAX5481–MAX5484
10
Maxim Integrated
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