參數(shù)資料
型號(hào): MAX5237
廠商: Maxim Integrated Products, Inc.
英文描述: Single-Supply 3V/5V, Voltage-Output, Dual, Precision 10-Bit DACs
中文描述: 單電源、3V/5V、電壓輸出、雙路、高精度10位DAC
文件頁(yè)數(shù): 11/19頁(yè)
文件大小: 553K
代理商: MAX5237
Serial Interface
The 3-wire serial interface (SPI/ QSPI/ and MICROWIRE
compatible) used in the MAX5236/MAX5237 allows for
complete control of DAC operations (Figures 4 and 5).
Figures 1 and 2 show the timing for the serial interface.
The serial word consists of 3 control bits followed by 10
data bits (MSB first) and 3 sub-bits as described in
Tables 1, 2, and 3. When the 3 control bits are all zero
or all 1, D9
D6 are used as additional control bits,
allowing for greater DAC functionality.
The digital inputs allow any of the following: loading the
input register(s) without updating the DAC register(s),
updating the DAC register(s) from the input register(s),
or updating the input and DAC register(s) simultane-
ously. The control bits and D9
D6 allow the DACs to
operate independently.
Send the 16-bit data as one 16-bit word (QSPI) or two
8-bit packets (SPI and MICROWIRE), with
CS
low dur-
ing this period. The control bits and D9
D6 determine
which registers update and the state of the registers
when exiting shutdown. The 3-bit control and D9
D6
determine the following:
Registers to be updated
Selection of the power-down modes
M
Single-Supply 3V/5V, Voltage-Output, Dual,
Precision 10-Bit DACs
______________________________________________________________________________________
11
CS
SCLK
DIN
COMMAND EXECUTED
9
8
16
(1)
1
C1
C2
S0
C0
D9
D8
D7
D6
D3
D2
D1
D0
S2
S1
D5
D4
Figure 1. Serial Interface Timing
CS
SCLK
DIN
t
CSW
t
CS1
t
CSH
t
CSS
t
CSO
t
CH
t
CL
t
CP
t
DS
t
DH
t
LDL
LDAC
t
CSLD
Figure 2. Detailed Serial Interface Timing
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