參數(shù)資料
型號(hào): MAX5232EEE+
廠商: Maxim Integrated Products
文件頁數(shù): 6/18頁
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL 3V SER 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
設(shè)置時(shí)間: 10µs
位數(shù): 10
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): *
MAX5232/MAX5233
Applications Information
Definitions
Integral Nonlinearity (INL)
Integral nonlinearity (Figure 6a) is the deviation of the val-
ues on an actual transfer function from a straight line.
This straight line can be either a best-straight-line fit
(closest approximation to the actual transfer curve) or a
line drawn between the endpoints of the transfer func-
tion, once offset and gain errors have been nullified. For
a DAC, the deviations are measured at every single step.
Differential Nonlinearity (DNL)
Differential nonlinearity (Figure 6b) is the difference
between an actual step height and the ideal value of
1LSB. If the magnitude of the DNL is less than 1LSB, the
DAC guarantees no missing codes and is monotonic.
Offset Error
The offset error (Figure 6c) is the difference between
the ideal and the actual offset point. For a DAC, the off-
set point is the step value when the digital input is zero.
This error affects all codes by the same amount and
can usually be compensated for by trimming.
Gain Error
Gain error (Figure 6d) is the difference between the
ideal and the actual full-scale output voltage on the
transfer curve, after nullifying the offset error. This error
alters the slope of the transfer function and corre-
sponds to the same percentage error in each step.
Settling Time
The settling time is the amount of time required from the
start of a transition, until the DAC output settles to its new
output value within the converter’s specified accuracy.
3V/5V, 10-Bit, Serial Voltage-Output Dual DACs
with Internal Reference
14
______________________________________________________________________________________
0
2
1
4
3
7
6
5
000
010
001
011
100
101
110
AT STEP
011 (1/2LSB )
AT STEP
001 (1/4LSB )
111
DIGITAL INPUT CODE
ANALOG
OUTPUT
VALUE
(LSB)
Figure 6a. Integral Nonlinearity
0
2
1
4
3
6
5
000
010
001
011
100
101
DIFFERENTIAL LINEARITY
ERROR (-1/4LSB)
DIFFERENTIAL
LINEARITY ERROR (+1/4LSB)
1LSB
DIGITAL INPUT CODE
ANALOG
OUTPUT
VALUE
(LSB)
Figure 6b. Differential Nonlinearity
0
2
1
3
000
010
001
011
ACTUAL
DIAGRAM
IDEAL DIAGRAM
ACTUAL
OFFSET
POINT
OFFSET ERROR
(+1 1/4LSB)
IDEAL OFFSET
POINT
DIGITAL INPUT CODE
ANALOG
OUTPUT
VALUE
(LSB)
Figure 6c. Offset Error
0
5
4
6
7
000
101
100
110
111
IDEAL DIAGRAM
GAIN ERROR
(-1 1/4LSB)
IDEAL FULL-SCALE OUTPUT
ACTUAL
FULL-SCALE
OUTPUT
DIGITAL INPUT CODE
ANALOG
OUTPUT
VALUE
(LSB)
Figure 6d. Gain Error
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