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  • 參數(shù)資料
    型號(hào): MAX520ACWE
    廠商: MAXIM INTEGRATED PRODUCTS INC
    元件分類: DAC
    英文描述: Differential Driver And Receiver Pair 14-SOIC -40 to 85
    中文描述: SERIAL INPUT LOADING, 2 us SETTLING TIME, 8-BIT DAC, PDSO16
    封裝: 0.300 INCH, SOP-16
    文件頁(yè)數(shù): 16/20頁(yè)
    文件大?。?/td> 274K
    代理商: MAX520ACWE
    M
    Quad/Oc tal, 2-Wire S erial 8-Bit DACs
    with Rail-to-Rail Outputs
    16
    ______________________________________________________________________________________
    __________Applic ations Information
    S hutdown Mode
    In shutdown mode, the MAX520/MAX521 reference
    inputs are disconnected from the R-2R ladder inputs,
    which saves power when the reference is not powered
    down. In addition, the MAX521’s output buffers are dis-
    abled, greatly reducing the supply current. The
    MAX520’s operating supply current does not change in
    shutdown mode. The Command Byte and Output Byte
    section describes how to enter and exit shutdown
    mode.
    Power-S upply Bypassing and
    Ground Management
    Bypass V
    DD
    with a 0.1μF capacitor, located as close to
    V
    DD
    and DGND as possible. The analog ground
    (AGND) and digital ground (DGND) pins should be
    connected in a “star” configuration to the highest quali-
    ty ground available, which should be located as close
    to the MAX521 as possible.
    Careful PC board layout minimizes crosstalk among
    DAC outputs, reference inputs, and digital inputs.
    Figure 16 shows the suggested PC board layout to mini-
    mize crosstalk.
    OUT2
    OUT3
    REF2
    REF3
    OUT1
    PIN1
    OUT0
    REF1
    REF0
    SYSTEM GND
    Figure 16. PC Board Layout for Minimizing Crosstalk (MAX521
    bottom view, DIP package)
    (1%)
    R
    T
    DAC
    R
    F
    R
    IN
    Figure 15a. Typical Trimming Circuit
    (1%)
    16k
    DAC
    R
    F
    R
    IN
    MAX520A
    Figure 15b. MAX520A Trimming Circuit
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    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
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