參數(shù)資料
型號: MAX5176BEEE+
廠商: Maxim Integrated Products
文件頁數(shù): 6/16頁
文件大?。?/td> 0K
描述: IC DAC 12BIT LP SERIAL 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
設(shè)置時間: 18µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
MAX5174/MAX5176
Low-Power, Serial, 12-Bit DACs
with Voltage Output
14
______________________________________________________________________________________
TO OTHER
SERIAL DEVICES
MAX5174
MAX5176
DIN
SCLK
CS
MAX5174
MAX5176
MAX5174
MAX5176
DIN
DOUT
SCLK
CS
DIN
SCLK
CS
Figure 9. Daisy-Chaining MAX5174/MAX5175 Devices
TO OTHER
SERIAL DEVICES
MAX5174
MAX5176
DIN
SCLK
CS
MAX5174
MAX5176
DIN
SCLK
CS
MAX5174
MAX5176
DIN
SCLK
CS
DIN
SCLK
CS1
CS2
CS3
Figure 10. Multiple MAX5174/MAX5176s Sharing Common DIN and SCLK Lines
Using an AC Reference
The MAX5174/MAX5176 accept references with AC
components, as long as the reference voltage remains
between 0 and VDD - 1.4V. Figure 11 shows a tech-
nique for applying a sine-wave signal to the reference
input where the AC signal is offset before being applied
to REF. The reference voltage must remain above
AGND.
Power-Supply and Layout Considerations
Wire-wrap boards are not recommended. For optimum
system performance, use printed circuit boards with
separate analog and digital ground planes. Connect
the two ground planes together at the low-impedance
power-supply source. Connect DGND and AGND pins
together at the IC. The best ground connection is
achieved by connecting the DAC’s DGND and AGND
pins together and connecting that point to the system
analog ground plane. This is useful because if the
DAC’s DGND is connected to the system digital
ground, digital noise may infiltrate the DAC’s analog
portion.
Bypass the power supply with a 4.7F capacitor in par-
allel with a 0.1F capacitor to AGND. Minimize capaci-
tor lead lengths to reduce inductance. If noise
becomes an issue, use shielding and/or ferrite beads to
increase isolation.
To maintain INL and DNL performance as well as gain
drift, it is extremely important to provide the lowest pos-
sible reference output impedance at the DAC reference
input pin. INL degrades if the series resistance on REF
pin exceeds 0.1
. The same consideration must be
made for the AGND pin.
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