參數(shù)資料
型號: MAX5140IPG
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: 8-Bit, Ultra-High-Speed DAC
中文描述: PARALLEL, 8 BITS INPUT LOADING, 0.004 us SETTLING TIME, 8-BIT DAC, PDIP24
封裝: 0.600 INCH, PLASTIC, DIP-24
文件頁數(shù): 7/12頁
文件大?。?/td> 141K
代理商: MAX5140IPG
This device also has two analog ground pins (V
CC
). Tie
both ground pins to the analog ground plane. All power
and ground pins must be connected in any application.
If a +5V power source is required, the V
CC
ground
pins become the positive supply pins, while the V
EE
supply pins become the ground pins. The relative
polarities of the other input and output voltages must
be maintained.
Referenc e Considerations
The MAX5140 has two reference inputs (Ref In and I
Set
)
and one reference output (Ref Out). The input pins are
connected to the inverting and noninverting inputs of
an internal amplifier that serves as a reference buffer.
The buffer amplifier’s output is the reference for the cur-
rent sinks. The amplifier feedback loop is connected
around one of the current sinks to achieve better accu-
racy. (See Figure 3.)
Since the analog output currents are proportional to the
digital input data and I
Set
, full-scale output can be
adjusted by varying the reference current. I
Set
is con-
trolled through the MAX5140’s I
Set
input. Figure 1
shows the method and the necessary equations for set-
ting I
Set
. The MAX5140 can use an external negative-
voltage reference. The external reference must be sta-
ble to achieve a satisfactory output, and Ref In should
be driven through a resistor to minimize offsets caused
by bias current. To change the full-scale output,
vary the value for I
Set
with the 500
to 1k
trimmer.
A double 50
load (25
) can be driven if I
Set
is
increased by 50% for doubly terminated 75
video
applications.
Data Inputs and V ideo Controls
The MAX5140 has standard, single-ended data inputs.
The inputs are registered to produce the lowest differ-
ential data-propagation delay (skew) to minimize glitch-
ing. Also, four video-control inputs generate composite
video outputs: sync, blank, bright, and reference white
(force high). Feedthrough control is also provided. All
of the controls and data inputs are ECL compatible. In
addition, all have internal pulldown resistors to leave
them at a logic low so the pins are inactive when not
used. This is useful if the devices are applied as stan-
dard DACs without the need for video controls, or if
fewer than eight bits are used.
The MAX5140 is usually configured in synchronous
mode. In this mode, the controls and data are synchro-
nized to prevent pixel dropout. This reduces screen-
edge distortions and provides the lowest output noise
while maintaining the highest conversion rate. With the
FT control open (low), each rising edge of the convert
clock (CONV) latches decoded data and control values
into a D-type internal register. The switched-current
sinks convert the registered data into the appropriate
analog output. When FT is tied high, the control inputs
and data are not registered. The analog output asyn-
chronously tracks the input data and video controls.
Feedthrough itself is asynchronous and is usually used
as a DC control.
M
8-Bit, Ultra-High-S peed DAC
_______________________________________________________________________________________
7
Figure 3. Reference Buffer and DAC Output Circuit
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