參數(shù)資料
型號: MAX5104CEE+T
廠商: Maxim Integrated Products
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC DAC 12BIT DUAL SER 16-QSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時間: 15µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
MAX5104
Low-Power, Dual, Voltage-Output, 12-Bit DAC
with Serial Interface
_______________________________________________________________________________________
7
allowing the MAX5104 to recall the output state prior to
entering power-down when returning to normal mode.
Exit power-down by recalling the previous condition or
by updating the DAC with new information. When
returning to normal operation (exiting power-down),
wait 20s for output stabilization.
Serial Interface
The MAX5104’s 3-wire serial interface is compatible
with both MICROWIRE (Figure 2) and SPI/QSPI (Figure 3)
serial-interface standards. The 16-bit serial input word
consists of 1 address bit, 2 control bits, 12 bits of data
(MSB to LSB), and 1 sub-bit as shown in Figure 4. The
address and control bits determine the MAX5104’s
response, as outlined in Table 1.
FUNCTION
A0
C1
C0
D11.......................D0
(MSB)
(LSB)
0
1
12-bit DAC data
Load input register A; DAC registers are unchanged.
0
1
12-bit DAC data
Load all DAC registers from the shift register
(start up both DACs with new data).
1
0
12-bit DAC data
Load input register B; all DAC registers are updated.
0
1
0
12-bit DAC data
Load input register A; all DAC registers are updated.
1
0
1
12-bit DAC data
Load input register B; DAC registers are unchanged.
0
1 1 0 X XXXXXXXX
Power Down DAC A (provided
PDL = 1).
0
1 0 1 X XXXXXXXX
Update DAC register B from input register B
(start up DAC B with data previously stored in input register B).
0
0 0 1 X XXXXXXXX
Update DAC register A from input register A
(start up DAC A with data previously stored in input register A).
1
XXXXXXXXXXXX
Shut down both DACs (provided
PDL = 1).
1
0
XXXXXXXXXXXX
Update both DAC registers from their respective input registers
(start up both DACs with data previously stored in the input registers).
0
1 1 1 X XXXXXXXX
Power Down DAC B (provided
PDL = 1).
0
0 1 0 X XXXXXXXX
UPO goes low (default).
0
0 1 1 X XXXXXXXX
UPO goes high.
0
1 0 0 1 XXXXXXXX
Mode 1, DOUT clocked out on SCLK’s rising edge.
0
1 0 0 0 XXXXXXXX
Mode 0, DOUT clocked out on SCLK’s falling edge (default).
0
0 0 0 X XXXXXXXX
No operation (NOP).
Table 1. Serial-Interface Programming Commands
X = Don’t care
Note: D11, D10, D9, and D8 become control bits when A0, C1, and C0 = 0. S0 is a sub-bit, always zero.
SCLK
DIN
CS
SK
SO
I/O
MICROWIRE
PORT
MAX5104
Figure 2. Connections for MICROWIRE
16-BIT SERIAL WORD
S0
0
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參數(shù)描述
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