MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status
FLAG
6
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Detailed Description
The MAX4838A/MAX4840A/MAX4842A provide up to
+28V overvoltage protection for low-voltage systems.
When the input voltage exceeds the overvoltage trip level,
the MAX4838A/MAX4840A/MAX4842A turn off a low-cost
external n-channel FET(s) to prevent damage to the pro-
tected components. An internal charge pump (Figure 5)
drives the FET gate for a simple, robust solution.
Undervoltage Lockout (UVLO)
The MAX4838A/MAX4840A have a fixed 3.25V typical
undervoltage-lockout level (UVLO) while the MAX4842A
has a 2.5V typical UVLO. When VIN is less than the
UVLO, the GATE driver is held low and FLAG is asserted.
Overvoltage Lockout (OVLO)
The MAX4838A has a 7.4V typical overvoltage threshold
(OVLO), and the MAX4840A has a 5.8V typical overvolt-
age threshold. The MAX4842A has a 4.7V typical over-
voltage threshold. When VIN is greater than OVLO, the
GATE driver is held low and FLAG is asserted.
FLAG Output
The FLAG output is used to signal the host system
there is a fault with the input voltage. FLAG asserts
immediately to an overvoltage fault. FLAG is held low
for 50ms after GATE turns on before deasserting.
All devices have an open-drain FLAG output. Connect
a pullup resistor from FLAG to the logic I/O voltage of
the host system.
EN Enable Input
EN is an active-low enable input. Drive EN low or con-
nect to ground to enable normal device operation.
Drive EN high to force the external MOSFET(s) off. EN
does not override an OVLO or UVLO fault.
GATE Driver
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times VIN until VIN exceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4838A has a 7.4V typical OVLO; therefore GATE
remains relatively constant at approximately 10.5V for
5.5V < VIN < 7.4V. The MAX4840A has a 5.8V typical
OVLO, but this can be as low as 5.5V. The MAX4840A
in practice may never actually achieve the full 10.5V
GATE output. The MAX4842A has a 4.7V (typ) OVLO,
and the GATE output voltage is 2x the input voltage.
The GATE output voltage as a function of input voltage
is shown in the Typical Operating Characteristics.
Device Operation
The MAX4838A/MAX4840A/MAX4842A have an on-
board state machine to control device operation. A
flowchart is shown in Figure 6. On initial power-up, if
VIN < UVLO or if VIN > OVLO, GATE is held at 0V, and
FLAG is low.
If UVLO < VIN < OVLO and EN is low, the device enters
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
VIN by the internal charge pump. FLAG is held low dur-
ing startup until the FLAG blanking period expires, typi-
cally 50ms after the GATE starts going high. At this
point the device is in its on state.
At any time if VIN drops below UVLO, FLAG is driven
low and GATE is driven to ground.
IN
GATE
GND
EN
5.5V
REGULATOR
2x CHARGE
PUMP
GATE DRIVER
CONTROL
LOGIC AND TIMER
UVLO AND
OVLO
DETECTOR
FLAG
MAX4838A
MAX4840A
MAX4842A
Figure 5. Functional Diagram