![](http://datasheet.mmic.net.cn/390000/MAX4754ETE_datasheet_16818151/MAX4754ETE_8.png)
M
Detailed Desc ription
The MAX4754/MAX4755/MAX4756 low on-resistance
analog switches operate from a single +1.8V to +5.5V
supply. The devices are fully specified for nominal 3V
applications.
The MAX4754 DPDT switch has two logic control inputs
with each input controlling two SPDT switches. Each
switch has a 0.5
on-resistance in the NO and NC ter-
minals making it ideal for switching audio signals.
The MAX4755 DPDT switch also has four 0.5
SPDT
switches with the switch pairs 1 and 2 adding an 11.5
series resistor to the NC terminal. This feature allows
the user to drive an 8
speaker as a 32
load, allowing
it to be used as an ear speaker. Two logic control
inputs are used to control the four switches.
The MAX4756 has four 0.5
SPDT switches controlled
by one logic control input (INA) and
EN
input to disable
the switches.
Applic ations Information
Digital Control Inputs
The MAX4754/MAX4755/MAX4756 logic inputs accept
up to +5.5V regardless of the supply voltage. For
example, with a +3.3V supply IN_ can be driven low to
GND and high to +5.5V, which allows mixed logic lev-
els in a system. Driving the control logic inputs rail-to-
rail also minimizes power consumption. For a +3V
supply voltage, the logic thresholds are 0.5V (low) and
1.4V (high).
For the MAX4756, drive
EN
low to enable the COM_.
When
EN
is high, COM _ is high impedance.
Analog S ignal Levels
Analog signal inputs over the full voltage range (0V to
V+) are passed through the switch with minimal change
in on-resistance (see the
Typical Operating Charac-
teristics
). The switches are bidirectional so NO_, NC_,
and COM_ can be either inputs or outputs.
Power-S upply Bypassing
Power-supply bypassing improves noise margin and pre-
vents switching noise from propagating from the V+ sup-
ply to other components. A 0.1μF capacitor connected
from V+ to GND is adequate for most applications.
UCS P Applic ations Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile, as well as the latest infor-
mation on reliability testing results, go to the Maxim
website at www.maxim-ic.com/ucsp for the Application
Note:
UCSP—A Wafer-Level Chip-Scale Package
.
0.5
, Quad S PDT S witc hes in UCS P/QFN
8
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