VIL LOGIC INPUT R
參數(shù)資料
型號(hào): MAX4719EUB+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 10/11頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH DUAL SPDT 10UMAX
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
Low Voltage Analog Switches Overview
標(biāo)準(zhǔn)包裝: 50
功能: 開(kāi)關(guān)
電路: 2 x SPDT
導(dǎo)通狀態(tài)電阻: 20 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V
電流 - 電源: 1µA
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-µMAX
包裝: 管件
Test Circuits/Timing Diagrams
tr < 5ns
tf < 5ns
50%
VIL
LOGIC
INPUT
RL
300
COM_
GND
IN_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
VOUT = VN_
(
RL
)
RL + RON
VN_
VIH
tOFF
0V
NO_
OR NC_
0.9 x V0UT
0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
CL
35pF
V+
VOUT
MAX4719
Figure 1. Switching Time
50%
VIH
VIL
LOGIC
INPUT
VOUT
0.9 x VOUT
tBBM
LOGIC
INPUT
RL
300
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
IN_
NC_
VOUT
V+
CL
35pF
VN_
COM_
MAX4719
Figure 2. Break-Before-Make Interval
MAX4719
Power-Supply Sequencing and
Overvoltage Protection
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings
may cause permanent damage to the device.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current-limited.
UCSP Package Considerations
For general UCSP package information and PC layout
considerations, please refer to the Maxim Application
Note (Wafer-Level Chip-Scale Package).
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a UCSP package. UCSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
frame. Solder joint contact integrity must be consid-
ered. Information on Maxim’s qualification plan, test
data, and recommendations are detailed in the UCSP
application note, which can be found on Maxim’s web-
site at www.maxim-ic.com.
Chip Information
TRANSISTOR COUNT: 235
PROCESS: BiCMOS
20
, 300MHz Bandwidth, Dual SPDT Analog
Switch in UCSP
8
_______________________________________________________________________________________
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MAX4719EUB+ 功能描述:模擬開(kāi)關(guān) IC 20Ohm 300MHz SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開(kāi)啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX4719EUB+T 功能描述:模擬開(kāi)關(guān) IC 20Ohm 300MHz SPDT Analog Switch RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開(kāi)啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX4719EUB-T 功能描述:模擬開(kāi)關(guān) IC RoHS:否 制造商:Texas Instruments 開(kāi)關(guān)數(shù)量:2 開(kāi)關(guān)配置:SPDT 開(kāi)啟電阻(最大值):0.1 Ohms 切換電壓(最大): 開(kāi)啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 工作電源電壓:2.7 V to 4.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-16
MAX471CPA 功能描述:特殊用途放大器 RoHS:否 制造商:Texas Instruments 通道數(shù)量:Single 共模抑制比(最小值): 輸入補(bǔ)償電壓: 工作電源電壓:3 V to 5.5 V 電源電流:5 mA 最大功率耗散: 最大工作溫度:+ 70 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-20 封裝:Reel
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